AT90PWM2 datasheet(224/365 Pages) ATMEL

224 / 365 page

224

AT90PWM2/3

4317B–AVR–02/05

Manchester decoder

When configured in Manchester mode, the EUSART receiver is able to receive serial

frame using a 17-bit shift register, an edge detector and several data/control registers.

The Manchester decoder receives a frame from the RxD pin of the EUSART interface

and loads the received data in the EUSART data register (UDR and EUDR).

The bit order of the data bits in the frame is configurable to handle MSB or LSB first.

The polarity of the bi-phase start is not configurable. The start bit a logical ‘1’ (rising

edge at bit center).

The polarity of the stop bits is not configurable, the interface allows to read the 2 stops

bits value by software.

The Manchester decoder is enable when the EUSART is configured in Manchester

mode and the RXEN of USCRB set (global USART receive enable).

The number of data bits to be received can be configured with the URxS bits of

EUSCRA register.

The Manchester decoder provides a special mode where 16 or 17 data bits can be

received. In this mode the Manchester decoder can automatically detects if the seven-

teenth bit is Manchester encoded or not (seventeenth data bit or first stop bit). If the

receiver detects a valid data bit (Manchester transition) during the seventeenth bit time

of the frame, the receiver will process the frame as a 17-bit frame lenght and set the

F1617 bit of EUSCRC register.

In Manchester mode, the clock used for sampling the EUSART input signal is pro-

grammed by the baudrate generator.

The Manchester decoder performs an autoadaptative synchronization with the received

data.

The edge detector of the Manchester decoder is based upon a 16 bits up/down counter

which maximum value can be configured through the MUBRRH and MUBRRL registers.

Typically the maximum counter value is given by the following formula:

MUBRR[H:L]=F

CLKIO / (2*baud rate frequency)

AT90PWM2 Datasheet(PDF) 224 Page - ATMEL Corporation