LTC4449 datasheet(19/48 Pages) AD

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LTC7872

Rev. 0

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The LTC7872’s PWMEN pin is used to communicate the

controller’s status with the external MOSFET drivers or

other LTC7872s. When the LTC7872 releases the PWMEN

pin but finds it is still pulled down externally, the LTC7872

will keep all the PWM pins in Hi-Z status.

Multiphase Operation

For output loads that demand high current, multiple

LTC7872s can be daisy chained to run out of phase to

provide more output current without increasing input and

output voltage ripple. The SYNC pin allows the LTC7872

to synchronize to the CLKOUT signal of another LTC7872.

The CLKOUT signal can be connected to the SYNC pin of

the following LTC7872 stage to line up both the frequency

and the phase of the entire system. When paralleling mul-

tiple ICs, please be aware of the input impedance of pins

connected to the same node.

Thermal Shutdown

The LTC7872 has a temperature sensor integrated on

the IC, to sense the die temperature. When the die tem-

perature exceeds 180°C, all switching actions stop, and

all PWM pins become Hi-Z, thus turning off all external

MOSFETs. At the same time, all the channels are discon-

nected from the IMON pins, and the SS and ITHHIGH/

ITHLOW pins continue to function normally, so as not to

interfere with other LTC7872 chips that may reference the

common pins. When the temperature drops 15°C below

the trip threshold, normal operation resumes.

Overcurrent Fault Monitor (OCFT and NOCFT)

Besides the peak/valley current comparator and the maxi-

mum average current regulation loops, the LTC7872 has

an additional overcurrent fault comparator to monitor the

voltage difference between the SNSD+ and SNS– pins.

If one channel’s (VSNSD+ – VSNS–) is larger than over-

current fault threshold (OCFT) or less than the negative

overcurrent threshold (NOCFT) as shown in the Table 4,

all four channels stop switching and all PWM pins are

Hi-Z. The OCFT and NOCFT status can be obtained

through the SPI interface by the MFR_OC_FAULT and

MFR_NOC_FAULT registers.

Table 4. OCFT and NOCFT Threshold

(VSNSD+ – VSNS–)

ILIM Pin

Voltage

OCFT

Threshold

NOCFT

Threshold

Hysteresis

37.5mV

–37.5mV

25mV

1/4 VV5

50mV

–50mV

31mV

Float

62.5mV

–62.5mV

31mV

3/4 VV5

75mV

–75mV

31mV

VV5

87.5mV

–87.5mV

31mV

PWM and PWMEN Pins

The PWM pins are three-state compatible outputs,

designed to drive power stages such as power blocks,

DrMOS, and drivers with MOSFETs, none of which repre-

sents a heavy capacitive load. An external resistor divider

may be used to set the PWM voltage to mid-rail while the

PWM is in the high impedance state.

The PWMEN pin is an open-drain output pin. It should

be pulled up by an external resistor to V5 when the

controller starts switching. During any fault status, the

LTC7872 pulls down the PWMEN pin to disable the exter-

nal MOSFET driver.

OPERATION

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