PCI1031PDV datasheet(13/100 Pages) TI

13 / 100 page

PCI1031

PCI-TO-PC CARD16 CONTROLLER UNIT

SCPS008B – FEBRUARY 1996 – REVISED DECEMBER 1997

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

architecture

This section provides an overview of the PCI1031 PCI-to-PC Card/CardBus controller, followed by detailed

descriptions of PCI and PC Card interfaces, the TPS2206 interface, and interrupt support. Both hardware

protocols and software programming models are discussed.

introduction to the PCI1031

The PCI1031 is a bridge between the PCI local bus and two PC Card sockets supporting 16-bit PC Cards, and

is compliant with the PCI local bus specification revision 2.1 and PCMCIA’s 1995 PC Card standard. The

PCI1031 PC Card interface recognizes and identifies PC Cards installed at power up or run-time. The PCI1031

includes support for 16-bit PC Card features such as multifunction cards, 3.3-V cards, and DMA, as well as

backward compatibility to the PCMCIA release 2.1-compliant PC Cards. The PCI1031 core is powered at 3.3 V

to provide low power dissipation, but can independently support either 3.3-V or 5-V signaling on the PCI and

PC Card interfaces.

Host software interacts with the PCI1031 through a variety of internal registers that provide status and control

information about the PC Cards currently in use and the internal operation of the PCI1031 itself. These internal

registers are accessed by application software either through the PCI configuration header, or through

programmable windows mapped into PCI memory or I/O address space. The PCI1031 uses a windows format

to pass cycles between PCI and PC Card address spaces. Host software must program the location and size

of these windows when the PCI1031 or PC Card is initialized.

The PCI1031 also communicates via a three-line serial protocol to the TI TPS2206 dual PCMCIA power switch.

The TPS2206 switches VCC and VPP supply voltage to the two PC Card sockets independently. Host software

has indirect control over the TPS2206 by writing to internal PCI1031 registers.

The PCI1031 can notify the host system via interrupts when an event occurs that requires attention from the

host. Such events are either card status-change (CSC) events or functional interrupts from a PC Card. CSC

events occur within the PCI1031 or at the PC Card interface, and indicate a change in the status of the socket

(i.e., card insertion or removal). Functional interrupts originate from the PC Card application and are passed

from the card to the host system. Both CSC and functional interrupts can be individually masked and routed

to a variety of system interrupts. The PCI1031 can signal the system interrupt controller via PCI-style interrupts,

ISA IRQs, or with the serialized IRQ protocol.

The following sections describe in greater detail how the PCI1031 interacts at an electrical, protocol, and

software level at its PCI interface, PC Cards, TPS2206 PC Card power control, and interrupts.

PCI1031PDV Datasheet(PDF) 13 Page - Texas Instruments