LT8335 datasheet(15/20 Pages) AD

15 / 20 page

LT8338

Rev. 0

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The output capacitor, along with the inductor and input

capacitor, should be placed on the same side of the circuit

board, and their connections should be made on that layer.

Place a local, unbroken power ground plane under the

application circuit on the layer closest to the surface layer.

The SW and BST nodes should be as small as possible.

Keep the CTRL and RT nodes small so that the ground

traces will shield them from the noise generated by the

SW and BST nodes. The exposed pad on the bottom of

the package should be soldered to GND to reduce ther-

mal resistance to ambient temperature. To keep thermal

resistance low, extend the power ground plane from GND

as much as possible and add thermal vias to additional

power ground planes within the circuit board and on the

bottom side.

Thermal Considerations

Care should be taken in the layout of the PCB to ensure

good heat sinking of the LT8338. The power ground

plane should consist of large copper layers with thermal

vias; these layers spread heat dissipated by the LT8338.

Placing additional vias can reduce thermal resistance

further. The maximum load current should be derated

as the ambient temperature approaches the maximum

junction temperature rating. Power dissipation within the

LT8338 can be estimated by calculating the total power

loss from an efficiency measurement and subtracting the

inductor loss. The junction temperature can be calculated

by multiplying the total LT8338 power dissipation by the

thermal resistance from junction to ambient and adding

the ambient temperature. The LT8338 includes internal

overtemperature protection that is intended to protect

the device during momentary overload conditions. The

overtemperature protection triggers the internal soft-start

when junction temperature exceeds 170°C. The maximum

rated junction temperature is exceeded when this protec-

tion is active. Continuous operation above the specified

absolute maximum operating junction temperature (see

Absolute Junction Ratings section) may impair device

reliability or permanently damage the device.

Figure 4. A Recommended PCB Layout for the LT8338

APPLICATIONS INFORMATION

8338 F04

RSM

VIN

BST

VOUT

10 INTVCC

CTRL

EN/

UVLO

6 SYNC/

MODE

GND

0805

0402

0805

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