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FXLS8967AF Datasheet(PDF) 30 Page - NXP Semiconductors |
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FXLS8967AF Datasheet(HTML) 30 Page - NXP Semiconductors |
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30 / 98 page  NXP Semiconductors FXLS8967AF 3-Axis Low-g Accelerometer Auto-increment Address Name Type Register Address F_READ = 0 F_READ = 1 Default Values BT_MODE = GND/[VDD] Comment INT_EN [1] [5] R/W 20h 21h 00h/[20h] Interrupt output enable register INT_PIN_SEL [1] [5] R/W 21h 22h 00h Interrupt output routing register (INT1, INT2 pins) Zero-g offset compensation registers OFF_X [1] [5] R/W 22h 23h 00h X-Axis acceleration zero-g offset: x_off[7:0] OFF_Y [1] [5] R/W 23h 24h 00h Y-Axis acceleration zero-g offset: y_off[7:0] OFF_Z [1] [5] R/W 24h 25h 00h Z-Axis acceleration zero-g offset: z_off[7:0] Output Buffer Configuration RESERVED_REG2 — 25h 26h 00h Factory reserved register address 2 BUF_CONFIG1 [1] [5] R/W 26h 27h 00h Output data buffer operating mode, trigger source selection, and data collection mode. BUF_CONFIG2 [1] [5] R/W 27h 28h 00h Output data buffer flush, gate control, and watermark level (buf_wmrk[5:0]). *The BUF_FLUSH bit may be set at any time in either STANDBY, ACTIVE, OR EXT_TRIG modes. Orientation detection function configuration and status ORIENT_STATUS [1] [2] R 28h 29h 00h Orientation event status ORIENT_CONFIG [1] [5] R/W 29h 2Ah 80h Orientation detection function configuration. ORIENT_DBCOUNT [1] [5] R/W 2Ah 2Bh 00h Orientation detection change debounce counter ORIENT_BF_ZCOMP [1] [5] R/W 2Bh 2Ch 44h Back/Front orientation state change threshold angle. ORIENT_THS_REG [1] [5] R/W 2Ch 2Dh 84h Orientation detection state change threshold angle (Portrait/Landscape) and hysteresis settings. Sensor data change detection function configuration and status SDCD_INT_SRC1 [1] [2] R 2Dh 2Eh 00h Sensor Data Change Detection function outside-of- thresholds event flags source register. SDCD_INT_SRC2 [1] [2] R 2Eh 2Fh 00h Sensor Data Change Detection function within thresholds event flags source register. SDCD_CONFIG1 [1] [5] R/W 2Fh 30h 00h/[38h] Sensor Data Change Detection function configuration register 1 – Enables event latch and individual axis bits for OT and WT logic function functions. SDCD_CONFIG2 [1] [5] R/W 30h 31h 00h/[D8h] Sensor Data Change Detection function configuration register 2 – SDCD function enable, reference values initialization, and update behavior, relative/absolute operating mode selection, debounce counter behavior. Note: Only the REF_UPD bit may be set in Active mode. SDCD_OT_DBCNT [1] [5] R/W 31h 32h 00h/[00h] Sensor Data Change Detection outside of thresholds condition debounce count value sdcd_ot_dbcnt[7:0] SDCD_WT_DBCNT [1] [5] R/W 32h 33h 00h/[00h] Sensor Data Change Detection within thresholds condition debounce count value – sdcd_wt_ dbcnt[7:0] SDCD_LTHS_LSB [1] [5] R/W 33h 34h 00h/[C0h] Sensor Data Change Detection lower threshold value LSB - sdcd_lths[7:0] SDCD_LTHS_MSB [1] [5] R/W 34h 35h 00h/[0Fh] Sensor Data Change Detection lower threshold value MSB - sdcd_lths[11:8]. SDCD_UTHS_LSB [1] [5] R/W 35h 36h 00h/[40h] Sensor Data Change Detection upper threshold value LSB - sdcd_uths[7:0] SDCD_UTHS_MSB [1] [5] R/W 36h 37h 00h/[00h] Sensor Data Change Detection upper threshold value MSB - sdcd_uths[11:8] SELF_TEST_CONFIG1 [1] [5] R/W 37h 38h 00h Self-Test Idle phase duration: SELF_TEST_CONFIG2 [1] [5] R/W 38h 39h 00h Self-Test measurement phase decimation factor Table 20. Register address map...continued FXLS8967AF All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Objective data sheet Rev. 1 — 27 April 2021 30 / 98 |
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