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FXLS93333 Datasheet(PDF) 147 Page - NXP Semiconductors |
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FXLS93333 Datasheet(HTML) 147 Page - NXP Semiconductors |
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147 / 254 page ![]() NXP Semiconductors FXLS9xxxx Dual channel inertial sensor incremented by one. The counter rolls over to '00' after the maximum value specified in the ARM_DS[1:0] bits is reached. 11.9.5 Arming pulse stretch function A pulse stretch function can be applied to the arming outputs in moving average mode, or count mode. If the pulse stretch function is not used (ARM_PS[1:0] = '00'), the arming output is asserted if and only if an arming condition exists for the associated channel after the most recent evaluated sample. The arming output is deasserted if and only if an arming condition does not exist for the associated channel after the most recent evaluated sample. If the pulse stretch function is used (ARM_PS[1:0] not equal '00'), the arming output is controlled only by the value of the pulse stretch timer value. If the pulse stretch timer value is non-zero, the arming output is asserted. If the pulse stretch timer is zero, the arming output is deasserted. The pulse stretch counter continuously decrements until it reaches zero. The pulse stretch counter is reset to the programmed pulse stretch value if and only if an arming condition exists for the associated channel after the most recent evaluated sample. See Figure 58. Exception conditions listed in Section 14.5 do not impact prior arming function responses. If an exception occurs after an arming activation, the corresponding pulse stretch for the existing arming condition will continue. However, new sensor reads will not reset the pulse stretch counter regardless of the sensor value. 11.9.6 Arming pin output structure The arming output pin structure can be set to active high, or active low with the ARM_CFG bits in the CHx_CFG_U4 registers as described in Section 11.2.26.4. The active high and active low pin output structures are shown in Figure 61. ARM FUNCTION open drain, active high open drain, active low GATING ARM ARM aaa-030644 VCC ARM FUNCTION GATING VCC Figure 61. Arming function - pin output structure 12 DSI3 protocol The DSI3[2] standard describes two function classes: Signal Function Class and Power Function Class. The device is a slave conforming to the Signal Function Class requirements. The device does not support Power Function Class. The following sections describe the DSI3 Signal Function Class features supported by the device. FXLS9xxxx All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 6 — 8 February 2021 147 / 254 |
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