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AT25PE20 Datasheet(PDF) 40 Page - Dialog Semiconductor |
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AT25PE20 Datasheet(HTML) 40 Page - Dialog Semiconductor |
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40 / 64 page ![]() 39 AT25PE20 DS-25PE20–139C–8/2018 16. Power-On/Reset State When power is first applied to the device, or when recovering from a reset condition, the output pin (SO) will be in a high impedance state, and a high-to-low transition on the CSB pin will be required to start a valid instruction. The SPI mode (Mode 3 or Mode 0) will be automatically selected on every falling edge of CSB by sampling the inactive clock state. 16.1 Power-Up/Power-Down Voltage and Timing Requirements As the device initializes, there will be a transient current demand. The system needs to be capable of providing this current to ensure correct initialization. During power-up, the device must not be accessed for at least the minimum t VCSL time after the supply voltage reaches the minimum V CC level. While the device is being powered-up, the internal Power- On Reset (POR) circuitry keeps the device in a reset mode until the supply voltage rises above the maximum POR threshold value (VPOR). During this time, all operations are disabled and the device will not respond to any commands. After power-up, the device will be in the standby mode. If the first operation to the device after power-up will be a program or erase operation, then the operation cannot be started until the supply voltage reaches the minimum V CC level and an internal device delay has elapsed. This delay will be a maximum time of tPUW. Table 16-1. Voltage and Timing Requirements for Power-Up/Power-Down Figure 16-1. Power-Up Timing Symbol Parameter Min Max Units V PWD (1) 1. Not 100% tested (value guaranteed by design and characterization). V CC for device initialization 1.0 V t PWD (1) Minimum duration for device initialization 300 µs t VCSL Minimum V CC to chip select low time for Read command 70 µs t VR (1) V CC rise time 1 500000 µs/V V POR Power on reset voltage 1.45 1.6 V t PUW Power up delay time before Program or Erase is allowed 3 ms VCC V POR max Max V PWD Time t PWD t PUW Full Operation Permitted t VR t VCSL Read Operation Permitted V CC min VPOR max V PWD max |
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