AT45DB021E datasheet(18/74 Pages) DIALOG

18 / 74 page

AT45DB021E

DS-AT45DB021E—8789J—03/2021

When a low-to-high transition occurs on the CS pin, the device erases the selected block of eight pages. The erase

operation is internally self-timed and takes place in a maximum time of tBE. During this time, the RDY/BUSY bit in

the Status Register indicates that the device is busy.

The device also incorporates an intelligent erase algorithm that can detect when a byte location fails to erase

properly. If an erase error arises, it is indicated by the EPE bit in the Status Register.

Table 7-1.

Block Erase Addressing

7.8

Sector Erase

The Sector Erase command can be used to individually erase any sector in the main memory.

The main memory array is comprised of nine sectors, and only one sector can be erased at a time. To perform an

erase of Sector 0a or Sector 0b with the standard DataFlash page size (264 bytes), an opcode of 7Ch must be

clocked into the device followed by three address bytes comprised of five dummy bits, seven page address bits

(PA9 - PA3), and 12 dummy bits. To perform a Sector 1-7 erase, an opcode of 7Ch must be clocked into the device

followed by three address bytes comprised of five dummy bits, three page address bits (PA9 - PA7), and 16

dummy bits.

To perform a Sector 0a or Sector 0b erase with the binary page size (256 bytes), an opcode of 7Ch must be

clocked into the device followed by three address bytes comprised of six dummy bits, seven page address bits

(A17 - A11), and 11 dummy bits. To perform a Sector 1-7 erase, an opcode of 7Ch must be clocked into the device

followed by six dummy bits, three page address bits (A17 - A15), and 15 dummy bits.

The page address bits are used to specify any valid address location within the sector is to be erased. When a low-

to-high transition occurs on the CS pin, the device erases the selected sector. The erase operation is internally

self-timed and takes place in a maximum time of tSE. During this time, the RDY/BUSY bit in the Status Register

indicates that the device is busy.

The device also incorporates an intelligent erase algorithm that can detect when a byte location fails to erase

properly. If an erase error arises, it is indicated by the EPE bit in the Status Register.

PA9/A17

PA8/A16

PA7/A15

PA6/A14

PA5/A13

PA4/A12

PA3/A11

PA2/A10

PA1/A9

PA0/A8

Block



124

125

126

127

AT45DB021E Datasheet(PDF) 18 Page - Dialog Semiconductor

AT45DB021E Datasheet(HTML) 18 Page - Dialog Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74

Datasheet Download

Link URL