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IMX6SDLCEC Datasheet(PDF) 130 Page - NXP Semiconductors |
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IMX6SDLCEC Datasheet(HTML) 130 Page - NXP Semiconductors |
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130 / 169 page ![]() i.MX 6Solo/6DualLite Applications Processors for Consumer Products, Rev. 9, 11/2018 130 NXP Semiconductors Electrical Characteristics 4.11.20 UART I/O Configuration and Timing Parameters 4.11.20.1 UART RS-232 I/O Configuration in Different Modes The i.MX 6Solo/6DualLite UART interfaces can serve both as DTE or DCE device. This can be configured by the DCEDTE control bit (default 0—DCE mode). Table 86 shows the UART I/O configuration based on the enabled mode. 4.11.20.2 UART RS-232 Serial Mode Timing The following sections describe the electrical information of the UART module in the RS-232 mode. 4.11.20.2.1 UART Transmitter Figure 95 depicts the transmit timing of UART in the RS-232 serial mode, with 8 data bit/1 stop bit format. Table 87 lists the UART RS-232 serial mode transmit timing characteristics. Figure 95. UART RS-232 Serial Mode Transmit Timing Diagram Table 86. UART I/O Configuration vs. Mode Port DTE Mode DCE Mode Direction Description Direction Description UARTx_RTS_B Output RTS from DTE to DCE Input RTS from DTE to DCE UARTx_CTS_B Input CTS from DCE to DTE Output CTS from DCE to DTE UARTx_DTR_B Output DTR from DTE to DCE Input DTR from DTE to DCE UARTx_DSR_B Input DSR from DCE to DTE Output DSR from DCE to DTE UARTx_DCD_ B Input DCD from DCE to DTE Output DCD from DCE to DTE UARTx_RI_B Input RING from DCE to DTE Output RING from DCE to DTE UARTx_TX_DATA Input Serial data from DCE to DTE Output Serial data from DCE to DTE UARTx_RX_DATA Output Serial data from DTE to DCE Input Serial data from DTE to DCE Table 87. RS-232 Serial Mode Transmit Timing Parameters ID Parameter Symbol Min Max Unit UA1 Transmit Bit Time tTbit 1/Fbaud_rate 1 - T ref_clk 2 1 F baud_rate: Baud rate frequency. The maximum baud rate the UART can support is (ipg_perclk frequency)/16. 2 T ref_clk: The period of UART reference clock ref_clk (ipg_perclk after RFDIV divider). 1/Fbaud_rate + Tref_clk — Start Bit Bit 1 Bit 2 Bit 0 Bit 4 Bit 5 Bit 6 Bit 7 UARTx_TX_DATA (output) Bit 3 STOP BIT Next Start Bit Possible Parity Bit Par Bit UA1 UA1 UA1 UA1 |
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