DA14682 datasheet(82/459 Pages) DIALOG

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Datasheet

Revision 3.3

6-Feb-2020

CFR0011-120-00-FM Rev 5

82 of 459

DA14682

Bluetooth Low Energy 5.0 SoC with Enhanced Security and FLASH

FINAL

The internal structure of the AES correlates with the

logic function of the AES algorithm.

• KeyExpansion: The “KeyExpansion” is the process

of generating the number of keys based on the initial

key. More specific generates 11, 13 and 15 keys

from an initial key of 128, 192 and 256 bits respec-

tively. Each round of the algorithm uses each one of

the above keys. For the encryption of each 128 bits

input we need to use all generated, from this pro-

cess, keys.

• AddRoundKey: Adds (modulo 2) the intermediate

status that the input data already transformed (128

bits) with one of the generated (from “KeyExpan-

sion”) keys. The output of this module contains the

result that produced from the application of all the

transformations that take place for the current round

of the algorithm.

• SBytesSRows: When encryption is taking place the

module applies the SubBytes transformation first

and then the ShiftRows transformation on the input

data.

• ISRowsISBytes: When decryption is taking place

this module applies the Inverse ShiftRows transfor-

mation and then the Inverse SubBytes on the input

data.

• MixCols: Being used for encryption and implements

the MixColumns transformation.

• IMixCols: Being used for decryption and implements

the Inverse MixColumns transformation.

• MainFSM: The basic FSM that controls all previous

modules. In general controls the complete AES

encryption/decryption.

All parts of AES is implemented using hardware includ-

ing the Key Expansion part.

14.1.3 Modes

The block “Modes” uses the AES in order to implement

the following modes of operations:

• ECB (Electronic Code Book)

• CBC (Cipher Block Chaining

• CTR (Counter)

Padding requirements of the algorithms, to convert all

data to multiples of 16 bytes (for AES), must be

addressed by software.

By applying successive programming of AES-CBC

encryptions using software, the realization of the

HMAC-XCBC-AES-96 algorithm is possible.

The implementation of the AES-CCM is feasible just

like the implementation of AES-CTR algorithms for

encryption, and AES-CBC for authentication.

14.1.4 HASH

The structure of the HASH block is presented in Figure

53:

INPP applies padding at the input data as required by

the hash algorithms. Two types of padding are imple-

mented, due to the different algorithms supported. The

purpose is to ensure that the message is a multiple of

512 bits or 1024 bits depending on the algorithm. Pad-

ding is done in a similar way in both cases. After the

last data byte, one extra byte of value 0x80 is added.

Next, a number of bytes (0x00) is added so that the

overall size of the data block (including the extra bytes)

mod 512/1024 is 448/896 depending on the algorithm.

Following that, a 64/128-bits big-endian number is

attached which represents the size of the data block, in

bits (without the padding). While in this process, TX/RX

FIFOs are switched into 8-bytes mode.

OUTPP packetizes the algorithm result (128 to 512

bits) into blocks of 64 bytes so that they can be shifted

to the TX FIFO.

HASH FUNC contains the logic implementing the fol-

lowing hash algorithms:

1. MD5: RFC1321

2. SHA-1: FIPS PUB 180-4

3. SHA-224/256: FIPS PUB180-4. In this case only

initialization changes.

4. SHA-384/512: FIPS PUB 180-4

As depicted in Figure 54, HASH FUNC comprises com-

mon and specific resources for all algorithms.

All registers are contained in the common resources.

Figure 52: AES Architecture

AddRoundKey

MainFSM

KeyExpansion

Figure 53: HASH block diagram

INPP

OUTPP

HASH FUNC

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