DA14682 datasheet(32/459 Pages) DIALOG

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Datasheet

Revision 3.3

6-Feb-2020

CFR0011-120-00-FM Rev 5

32 of 459

DA14682

Bluetooth Low Energy 5.0 SoC with Enhanced Security and FLASH

FINAL

Power management

The DA14682 has a complete integrated power man-

agement unit (PMU) which comprises a Single Induct-

ance Multiple Output (SIMO) DC-DC converter with 4

outputs, various LDOs for the different power domains

of the system, a Constant Current Constant Voltage

(CCCV) charger for battery recharging, a charge detec-

tion circuit and a fuel gauge monitoring the remaining

battery charge when system is in active mode. The

PMU is capable of supplying external devices even

when the DA14682 is in sleep mode.

The system diagram of the analog Power Management

Unit (PMU) is presented in Figure 11.

Features

• Synchronous Single Inductance Multiple Output

Buck DC-DC converter with 4 output power rails

• Programmable DC-DC converter output charging

sequence

• Two DC-DC converter outputs at 1.8 V with 75 mA

load capability for powering external devices

• One LDO output up to 3.45 V with up to 110 mA load

capability

• Retention LDOs up to 10 mA that can be kept alive

during active

• DC-DC converter on/off control per output

• Active and Sleep mode current limited LDOs

• Use of small external components

• Supply of external rails (V33, VDD1V8, VDD1V8P)

while in Sleep mode

• Fuel gauge to indicate state-of-charge

• CCCV charger with battery/die-temperature protec-

tion

• Interrupt line for the DC-DC converter and VBUS

availability

4.1 ARCHITECTURE

There are 3 main power inputs, namely VBUS, VBAT1

and VBAT2. The VBUS is connected when charging

the battery through the USB connector. VBAT1 should

be shorted with VBAT2 externally and supplies the

LDOs, while VBAT2 supplies the SIMO DCDC con-

verter. There are certain parts of the PMU which are

always powered. They are designated in red in Figure

11. The always on power circuitry consists of 2 clamps

and LDO_SLEEP which provides the necessary volt-

Figure 11: Power management unit block diagram

VBUS

VBAT1

LDO-

VBAT

3.3V

Digital core

Dig.

Wake-up

ON/ OFF black blocks

ON/ OFF green blocks

V12

LDO_ core

(by- pass)

1.2V

SIMO

Buck

DCDC

LDO-

USB

3.3V

CCCV

charger

LDO_ret

(clamp~2V)

Low power

LDO_ sleep

(clamp~1V)

Low power

LDO_ret

(clamp~2V)

Low power

Radio

USB

Vsys (1.7 V - 3.45V)

Vcore(1.2V)

Vflash(1.8V)

Vradio(1.4V)

LDO_IO

Band- gap

RC16

RCX

Open-

drain

Vcont(<3.3V)

USB -

Charge

-detect

XTAL16M

XTAL32k

LDO-

VBAT_

RET

LDO_IO

_RET

VDDIO

QSPI-I/O

LDO_ radio

(by- pass)

1.4V

V33

Vsys

GPIOs

SOCP

SOCN

(4.2 V - 5.75V)

75mA/10 mA

50mA

0.47uH

10 uF

10uF

4.7uF

0.1 Ohm

(1.7 V - 4.75V)

FUEL

GAUGE

4.7uF

20mA

V14

Vcore

10uF

LDO_IO2

LDO_IO

_RET2

Vext(1.8V) 75mA/10 mA

RC32

VBAT2

10 uF

LDO

1V2

V14_RF

ADC,

PLL

LDO

1V2

110mA

/10mA

VDD1V8

VDD1V8P

DA14682 Datasheet(PDF) 32 Page - Dialog Semiconductor

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