DA14682 datasheet(87/459 Pages) DIALOG

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Datasheet

Revision 3.3

6-Feb-2020

CFR0011-120-00-FM Rev 5

87 of 459

DA14682

Bluetooth Low Energy 5.0 SoC with Enhanced Security and FLASH

FINAL

tightly coupled memory used to store intermediate vari-

ables.

15.1.1 Supported curves

Due to the flexible architecture any curve should be

able to implement in μ-Code. The currently available

are:

• NIST recommended Curves:

• Prime Field P-192, P-224, P-256

• Binary Field K-163, K-233

• Binary Field B-163, B-233

• Brainpool and SEC2 Curves

• Curve25519

•Average μ-Code size for these curves is 3 kB.

• Average clock cycle amount for executing each

curve is 100 k cycles

15.1.2 Supported high level algorithms

A number of cryptography algorithms involving other

hardware resources than just the ECC are available as

described in Table 33, including their latency in system

clock cycles:

15.2 PROGRAMMING

In order to interact with the ECC several steps are nec-

essary. At first the ECC Crypto Module needs to get

started and initialized:

• Enable clock to the ECC Crypto Module at

CLK_AMBA_REG[ECC_CLK_ENABLE]

• Specify address space inside DataRAM to be used

by the ECC block by programming the

ECC_BASE_ADDR_REG

• Load micro code into ECC u-Code RAM starting at

address 0x40030000. The microcode itself can be

located in the OTP header inside the Elliptic curve

content section (ECS), or in the FLASH

• In case the interrupt is to be used, the corresponding

IRQ vector needs to be provided and the IRQ needs

to get enabled both in the Interrupt controller and the

ECC block by programming

Before executing any arithmetic operation, all required

parameters, operands and data must be written in the

shared memory whose address is defined at

ECC_BASE_ADDR_REG.

Depending on the operations to execute, some param-

eters or operands (like the prime modulus N or P) must

be located in pre-defined/fixed addresses while some

other input/output operands and results can be passed

to/from programmable addresses by using specific

pointers

(ECC_OPPTRA,

ECCOPPTRB

and

ECC_OPPTRC)

the

configuration

ECC_CONFIG_REG.

The programming flow is illustrated in Figure 56.

Please note that the size of the individual operands

must not exceed 256bit. However operand widths of

64bit as well as 128bit are also supported. In the arith-

metic unit all operands are executed on blocks whose

length is a multiple of 64bit. If needed input data that

are written in memory must be extended with zeroes to

get the right length (defined size of operands). Data is

stored in the crypto memory following the little endian

format.

15.2.1 Example: ECDSA signature generation

As explained in the previous section, some of the

parameters or operands need to be available at prede-

fined fixed addresses before starting the execution of

the ECDSA signature generation. They all reside in the

ECC crypto space in the DataRAM. Table 34 describes

the actual sequence of the steps required and their

respective commands.

Table 33: ECC algorithms latency

Algorithm

Routine

ECC

cycles

(M)

JPAKE-p256

step1_generate

4.5

step1_verify

4.5

step2_generate

2.3

step2_verify

2.3

seskey_generate

2.3

EdDSA -

Ed25519

pk_generate

0.7

sign_generate

0.7

sign_verify

1.4

ECDH -

Curve25519

pk_generate

0.5

seskey_generate

0.5

ECDH -

P256

pk_generate

1.1

seskey_generate

1.1

ECDSA -

P256

pk_generate

1.1

sign_generate

1.15

sign_verify

2.3

ECKCDSA -

P256

pl_generate

1.1

sign_generate

1.2

sign_verify

2.2

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