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DLPA2000 Datasheet(PDF) 3 Page - Texas Instruments

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Part # DLPA2000
Description  DLP300S 0.3-Inch 3.6-Megapixel DMD for Low Cost TI DLP짰 3D Printers
PDF  39 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

DLPA2000 Datasheet(HTML) 3 Page - Texas Instruments

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5 Pin Configuration and Functions
Figure 5-1. FQK Package 57-Pin LGA (Bottom View)
Table 5-1. Pin Functions – Connector Pins(1)
PIN
TYPE
SIGNAL
DATA RATE
DESCRIPTION
PACKAGE NET
LENGTH(2) (mm)
NAME
NO.
DATA INPUTS
D_N(0)
C9
I
SubLVDS
Double
Data, Negative
10.54
D_P(0)
B9
I
SubLVDS
Double
Data, Positive
10.54
D_N(1)
D10
I
SubLVDS
Double
Data, Negative
13.14
D_P(1)
D11
I
SubLVDS
Double
Data, Positive
13.14
D_N(2)
C11
I
SubLVDS
Double
Data, Negative
14.24
D_P(2)
B11
I
SubLVDS
Double
Data, Positive
14.24
D_N(3)
D12
I
SubLVDS
Double
Data, Negative
14.35
D_P(3)
D13
I
SubLVDS
Double
Data, Positive
14.35
D_N(4)
D4
I
SubLVDS
Double
Data, Negative
5.89
D_P(4)
D5
I
SubLVDS
Double
Data, Positive
5.89
D_N(5)
C5
I
SubLVDS
Double
Data, Negative
5.45
D_P(5)
B5
I
SubLVDS
Double
Data, Positive
5.45
D_N(6)
D6
I
SubLVDS
Double
Data, Negative
8.59
D_P(6)
D7
I
SubLVDS
Double
Data, Positive
8.59
D_N(7)
C7
I
SubLVDS
Double
Data, Negative
7.69
D_P(7)
B7
I
SubLVDS
Double
Data, Positive
7.69
DCLK_N
D8
I
SubLVDS
Double
Clock, Negative
8.10
DCLK_P
D9
I
SubLVDS
Double
Clock, Positive
8.10
CONTROL INPUTS
LS_WDATA
C12
I
LPSDR(1)
Single
Write data for low speed interface.
7.16
LS_CLK
C13
I
LPSDR
Single
Clock for low-speed interface
7.89
DMD_DEN_ARSTZ
C14
I
LPSDR
Asynchronous reset DMD signal. A low
signal places the DMD in reset. A high
signal releases the DMD from reset
and places it in active mode.
LS_RDATA
C15
O
LPSDR
Single
Read data for low-speed interface
POWER (3)
VBIAS
C1
Power
Supply voltage for positive bias level at
micromirrors
VBIAS
C18
Power
www.ti.com
DLP300S
DLPS214A – JULY 2021 – REVISED AUGUST 2021
Copyright © 2021 Texas Instruments Incorporated
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Product Folder Links: DLP300S



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