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ES9038Q2M Datasheet(PDF) 48 Page - ESS Technology,Inc

Part # ES9038Q2M
Description  32-Bit Stereo Low Power Audio DAC
PDF  65 Pages
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Manufacturer  ESS [ESS Technology,Inc]
Direct Link  http://www.esstech.com
Logo ESS - ESS Technology,Inc

ES9038Q2M Datasheet(HTML) 48 Page - ESS Technology,Inc

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CONFIDENTIAL Rev. 1.3
July 17, 2019
ES9038Q2M Datasheet
ESS TECHNOLOGY, INC. 237 South Hillview Drive, Milpitas, CA 95035, USA Tel (408) 643-
8800 • Fax (408) 643-8801
48
Register 96 (Read-Only): Input Selection and Automute Status
Bits
[7:6]
[5:4]
[3]
[2]
[1]
[0]
Mnemonic
Reserved
reserved
dop_valid
spdif_valid
i2s_select
dsd_select
Default
2’b00
2’b00
1’b0
1’b0
1’b0
1’b0
Bit
Mnemonic
Description
[7:6]
reserved
[5:4]
reserved
[3]
dop_valid
Contains the status of the DoP decoder.
•
1’b0: The DoP decoder has not detected a valid DoP signal.
•
1’b1: The DoP decoder has detected a valid DoP signal on the
I2S input.
[2]
spdif_valid
Contains the status of the SPDIF decoder.
•
1’b0: The SPDIF decoder has not found a valid SPDIF signal.
•
1’b1: The SPDIF decoder has detected a valid SPDIF signal.
[1]
i2s_select
Contains the status of the I2S decoder.
•
1’b0: The I2S decoder has not found a valid frame clock or bit
clock.
•
1’b1: The I2S decoder has detected a valid frame clock and bit
clock arrangement.
[0]
dsd_select
Contains the status of the DSD decoder.
•
1’b0: The DSD decoder is not being used.
•
1’b1: The DSD decoder is being used as a fallback option if I2S
has failed to decode their respective input signals.
Register 97-99 (Read-Only): Reserved
Register 100-102 (Read-Only): ADC Readback
Bits
[23:0]
Mnemonic
adc_ch1
Default
24’d0
Bit
Mnemonic
Description
[23:0]
adc_ch1
A signed 24-bit number for ADC channel 1. This value is latched on the
reading of the LSBs (register 100).



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