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SN8045 Datasheet(PDF) 39 Page - Texas Instruments |
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SN8045 Datasheet(HTML) 39 Page - Texas Instruments |
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39 / 88 page ![]() www.ti.com 6.2 ADCTL1 (address 8031h): ADC Control Register 1 6.3 ADHI, ADMID, ADLO (address 8032h, 8033h, 8034h): ADC Data Registers SN8040 SN8045 Cool-GG Programmable Battery Management IC SLUS753B – JANUARY 2007 – REVISED FEBRUARY 2008 This register signals when data is ready from the ADC peripheral and controls the ground reference selection. ADCTL1 REGISTER (ADDRESS 8031h) 7 6 5 4 3 2 1 0 Name – – – – – – GND_SEL ADC_DRDY Access – – – – – – R/W R Reset 1 0 0 0 0 0 0 0 Reserved (bits 7:2): Do not use. GND_SEL (bit 1): Ground select control. This signal controls which ground reference is used in the single-ended conversions. 1 = GSRN 0 = VSS (default) ADC_DRDY (bit 0): Data ready flag. This read-only bit signals when valid data are ready in ADLO, ADHI and ADMID. 1 = Valid data are ready 0 = Conversion in progress or ADC held in reset, ADC_DRDY goes low on the falling edge of CONV These store the result of the ADC data after conversion is complete. ADR0 is the LSB and ADR23 is the MSB. ADHI REGISTER (ADDRESS 8032h) 7 6 5 4 3 2 1 0 Name ADR23 ADR22 ADR21 ADR20 ADR19 ADR18 ADR17 ADR16 Access R R R R R R R R Reset 1 0 0 0 0 0 0 0 ADMID REGISTER (ADDRESS 8033h) 7 6 5 4 3 2 1 0 Name ADR15 ADR14 ADR13 ADR12 ADR11 ADR10 ADR9 ADR8 Access R R R R R R R R Reset 0 01 0 0 0 0 0 0 ADL0 REGISTER (ADDRESS 8034h) 7 6 5 4 3 2 1 0 Name ADR7 ADR6 ADR5 ADR4 ADR3 ADR2 ADR1 ADR0 Access R R R R R R R R Reset 0 0 0 0 0 0 0 0 Submit Documentation Feedback Analog-to-Digital Converter (ADC) Operation 39 |
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