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SN8045 Datasheet(PDF) 20 Page - Texas Instruments |
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SN8045 Datasheet(HTML) 20 Page - Texas Instruments |
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20 / 88 page  www.ti.com 3.2 Watchdog Timer WDRST=L WDRST=H REG25Output CHG,DSG,and ZVCHG=OFF CHG,DSG,and ZVCHG=OFF REG25Output WDIInput WDIInput ALERT ALERT FETControl AccessbyHost FETControl AccessbyHost RESET Output RESET Output t RST t WDTINT(500 ms) t WDTINT(500 ms) t WDTINT(500 ms) t WDTINT(500 ms) Twice t RST t RST t RST t WDTINT(500 ms) REG25Output WDIInput FETControl AccessbyHost FETControl AccessbyHost RESET Output NormalOperation NormalOperation ALERT REG25Output Twice WDIInput RESET Output ALERT WDRST=L WDRST=H t WDTINT(500 ms) t WDTINT(500 ms) t WDTINT(500 ms) t WDWT t WDWT t RST t RST t RST t RST CHG,DSG,and ZVCHG=OFF CHG,DSG,and ZVCHG=OFF 3.3 Cell Voltage Multiplexer and High Voltage Translation 3.3.1 2, 3 or 4 cell hardware configuration SN8040 SN8045 Cool-GG Programmable Battery Management IC SLUS753B – JANUARY 2007 – REVISED FEBRUARY 2008 The hardware watchdog timer disables charge and discharge FETs in case of CPU malfunction. It can also be configured to reset the CPU. The watchdog of the hardware AFE can be configured to watch the internal clock coming from RC4 at startup for oscillator frequency. If there is no response from the MCU with tWDINT after tRST has expired, then the hardware AFE turns the CHG, DSG and ZVCHG off , set the WDF flag and pulls RESET low in order to reset the MCU if connected to MRST. The WDF flag remains even there is oscillation detected at the watchdog input and the MCU need to clear the WDF flag. In normal mode the hardware AFE will turn the CHG and DSG an ZVCHG off if there is no response from MCU within tWDINT after tWDWT has expired. The watchdog timer is also active in sleep mode. Figure 3-2. Watchdog Timing Chart - WDI Fault at startup Figure 3-3. Watchdog Timing Chart - WDI Fault at normal operation All individual cell voltages, battery stack voltage and battery pack input voltage can be selected for measurement by the internal ADC. The internal cell voltage multiplexer and high voltage translation automatically translates the high voltage levels to accurate levels suitable for the internal ADC. In a 2 cell configuration, the VC1 pin and VC2 pin is connected to VC3. In a 3 cell configuration, VC1 is connected to VC2. General Operation Overview 20 Submit Documentation Feedback |
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