SN8045 datasheet(13/88 Pages) TI

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SN8040

SN8045

Cool-GG Programmable Battery Management IC

SLUS753B – JANUARY 2007 – REVISED FEBRUARY 2008

Electrical Characteristics (continued)

over operating free-air temperature range (unless otherwise noted), TA = –40°C to 85°C, VREG25 = 2.41 V to 2.59 V,

VBAT = 14V, CREG25 = 1µF, CREG33 = 2.2µF; typical values at TA = 25°C (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

ΔVREG33L

5.4 < VCC or BAT < 25V; IREG33OUT

Line regulation

INE

= 2mA

0.2mA

≤ I

REG33OUT ≤ 2mA

ΔVREG33L

Load Regulation

OAD

0.2mA

≤ I

REG33OUT ≤ 25mA

100

drawing current until REG33 = 3V

100

145

IREG33MA

Current Limit

short REG33 to VSS, REG33 = 0V

THERMISTOR DRIVE

VTOUT

Output voltage

ITOUT = 0mA; TA = 25°C

VREG25

ITOUT = 1mA; RDS(ON) = (VREG25 -

RDS(ON)

TOUT pass element resistance

100

Ω

VTOUT) / 1mA; TA = –40°C to 100°C

VCELL+ HIGH VOLTAGE TRANSLATION

VC(n) - VC(n+1) = 0V; TA = –40°C to

0.950

0.975

100

°C

VVCELL+O

VC(n) - VC(n+1) = 4.5V; TA = –40°C

0.275

0.3

0.375

to 100

°C

VVCELL+R

internal AFE reference voltage ; TA =

Translation output

0.965

0.975

0.985

–40

°C to 100°C

VVCELL+P

Voltage at PACK pin; TA = –40°C to

0.98*VPAC

1.02*VPA

VPACK/18

ACK

100

°C

K/18

CK/18

VVCELL+B

Voltage at BAT pin; TA = –40°C to

0.98*VBAT/

1.02*VBA

VBAT/18

100

°C

T/18

CMMR

Common mode rejection ratio

VCELL+

K= {VCELL+ output (VC5=0V;

VC4=4.5V) - VCELL+ output

0.147

0.150

0.153

(VC5=0V; VC4=0V)}/4.5

Cell scale factor

K= {VCELL+ output (VC2=13.5V;

VC1=18V) - VCELL+ output

0.147

0.150

0.153

(VC5=13.5V; VC1=13.5V)}/4.5

IVCELL+OU

VC(n) - VC(n+1) = 0V; VCELL+ =

Drive Current to VCELL+ capacitor

µA

0V; TA = –40°C to 100°C

CELL output (VC2 = VC1 = 18V) -

VVCELL+O CELL offset error

-18

-1

CELL output (VC2 = VC1 = 0V)

VC1=12V, VC2=9V, VC3=6V,

IVCnL

VC(n) pin leakage current

-1

0.01

µA

VC4=3V, VC5=0V

CELL BALANCING

RDS(on) for internal FET switch at VDS

RBAL

internal cell balancing FET resistance

200

400

600

Ω

= 2V; TA = 25°C

HARDWARE SHORT CIRCUIT AND OVERLOAD PROTECTION; TA = 25°C (unless otherwise noted)

VOL = 25mV (min)

V(OL)

OL detection threshold voltage accuracy

VOL = 100mV; RSNS = 0, 1

100

110

VOL = 205mV (max)

185

205

225

VSCC = 50mV (min)

SCC detection threshold voltage

V(SCC)

VSCC = 200mV; RSNS = 0, 1

180

200

220

accuracy

VSCC = 475mV (max)

428

475

523

VSCD = –50mV (min)

–30

–50

–70

SCD detection threshold voltage

V(SCD)

VSCD = –200mV; RSNS = 0, 1

–180

–200

–220

accuracy

VSCD = –475mV (max)

–428

–475

–523

tda

Delay time accuracy

±15.25

µs

tpd

Protection circuit propagation delay

µs

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