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SN8045 Datasheet(PDF) 16 Page - Texas Instruments |
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SN8045 Datasheet(HTML) 16 Page - Texas Instruments |
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16 / 88 page ![]() www.ti.com 2.4 Data Flash Characteristics Over Recommended Operating Temperature and Supply 2.5 SMBus Timing Characteristics SN8040 SN8045 Cool-GG Programmable Battery Management IC SLUS753B – JANUARY 2007 – REVISED FEBRUARY 2008 Electrical Characteristics (continued) over operating free-air temperature range (unless otherwise noted), TA = –40°C to 85°C, VREG25 = 2.41 V to 2.59 V, VBAT = 14V, CREG25 = 1µF, CREG33 = 2.2µF; typical values at TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT HIGH FREQUENCY OSCILLATOR f(OSC) Operating frequency 4.194 MHz –3% 0.25% 3% f(EIO) Frequency error (16)(17) TA = 20°C to 70°C –2% 0.25% 2% t(SXO) Start-up time(18) 2.5 5 ms LOW FREQUENCY OSCILLATOR f(LOSC) Operating frequency 32.768 kHz –2.5% 0.25% 2.5% f(LEIO) Frequency error(17)(19) TA = 20°C to 70°C –1.5% 0.25% 1.5% t(LSXO) Start-up time(18) 500 µs (16) The frequency error is measured from 4.194 MHz. (17) The frequency drift is included and measured from the trimmed frequency at VREG25 = 2.5V, TA = 25°C (18) The startup time is defined as the time it takes for the oscillator output frequency to be ±3% (19) The frequency error is measured from 32.768 kHz. Voltage Typical Values at TA = 25°C and VREG25= 2.5 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Data retention 10 Years Flash programming write-cycles 20k Cycles t(ROWPROG) Row programming time See (1) 2 ms t(MASSERASE) Mass-erase time 200 ms t(PAGEERASE) Page-erase time 20 ms I(DDPROG) Flash-write supply current 5 10 mA I(DDERASE) Flash-erase supply current 5 10 mA RAM BACKUP V(RBI) > V(RBI)MIN , VREG25 < VIT–, TA = 1000 2500 85 °C I(RB) RB data-retention input current nA V(RBI) > V(RBI)MIN , VREG25 < VIT–, TA = 90 220 25 °C V(RB) RB data-retention input voltage(1) 1.7 V (1) Assured by design. Not production tested. over operating free-air temperature range, Typical Values at TA = 25°C and VREG25 = 2.5 V (Unless Otherwise Noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT fSMB SMBus operating frequency Slave mode, SMBC 50% duty cycle 10 100 kHz fMAS SMBus master clock frequency Master mode, No clock low slave 51.2 kHz extend t(BUF) Bus free time between start and stop (see 4.7 µs Figure 2-1) t(HD:STA) Hold time after (repeated) start (see Figure 2-1) 4.0 µs t(SU:STA) Repeated start setup time (see Figure 2-1) 4.7 µs t(SU:STO) Stop setup time (see Figure 2-1) 4.0 µs Specifications 16 Submit Documentation Feedback |
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