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TUSB1104 Datasheet(PDF) 36 Page - Texas Instruments |
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TUSB1104 Datasheet(HTML) 36 Page - Texas Instruments |
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36 / 55 page  Return to the Summary Table. This register is used to program the EQ used for long channel setting when Fast AEQ is enabled. Table 7-17. AEQ_LONG Register Field Descriptions Bit Field Type Reset Description 7-4 LONG_CEQ2 R/W 7h When AEQ_EN = 1 and AEQ_MODE = x0 (i.e., Fast), selects EQ setting for USB connector port2 (CRX2) when long channel is detected. The user should program this field with the value that provides the best Rx JTOL results for a long channel configuration. 3-0 LONG_CEQ1 R/W 7h When AEQ_EN = 1 and AEQ_MODE = x0, selects EQ setting for USB connector port1 (CRX1) when long channel is detected. The user should program this field with the value that provides the best Rx JTOL results for a long channel configuration. 7.6.1.8 USBC_EQ Register (Offset = 20h) [Reset = 00h] USBC_EQ is shown in Table 7-18. Return to the Summary Table. This register controls the receiver equalization setting for the connector receiver (CRX1 and CRX2). Table 7-18. USBC_EQ Register Field Descriptions Bit Field Type Reset Description 7-4 CEQ2_SEL RH/W 0h If AEQ_EN = 0, this field selects EQ for USB CRX2 receiver which faces the USB-C receptacle. When EQ_OVERRIDE = 0b, this field reflects the sampled state of CEQ[1:0] pins. When EQ_OVERRIDE = 1b, software can change the EQ setting for CRX2p/n pins based on value written to this field. When AEQ_EN = 1 and AEQ_MODE = x0, selects EQ setting for USB connector port2 (CRX2) when short channel is detected. The user should program this field with the value that provides the best Rx JTOL results for a short channel configuration. 3-0 CEQ1_SEL RH/W 0h If AEQ_EN = 0, this field selects EQ for USB CRX1 receiver which faces the USB-C receptacle. When EQ_OVERRIDE = 0b, this field reflects the sampled state of CEQ[1:0] pins. When EQ_OVERRIDE = 1b, software can change the EQ setting for CRX1p/n pins based on value written to this field. When AEQ_EN = 1 and AEQ_MODE = x0, selects EQ setting for USB connector port1 (CRX1) when short channel is detected. The user should program this field with the value that provides the best Rx JTOL results for a short channel configuration. 7.6.1.9 SS_EQ Register (Offset = 21h) [Reset = 00h] SS_EQ is shown in Table 7-19. Return to the Summary Table. This register controls the receiver equalization setting for the SSTX1 and SSTX2. Table 7-19. SS_EQ Register Field Descriptions Bit Field Type Reset Description 7-4 SSEQ2_SEL RH/W 0h This field selects EQ for USB3 SSTX2 receiver which faces the USB host. When EQ_OVERRIDE = 0b, this field reflects the sampled state of SSEQ[1:0] pins. When EQ_OVERRIDE = 1b, software can change the EQ setting for SSTX2p/n pins based on value written to this field. TUSB1104 SLLSFL1 – APRIL 2022 www.ti.com 36 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TUSB1104 |
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