SAF7741 datasheet(49/83 Pages) NXP

49 / 83 page

SAF7741_5

Objective data sheet

Rev. 05 — 09 May 2008

49 of 83

NXP Semiconductors

SAF7741HV

Dual IF car radio and audio DSP (N1F)

7.8 Common system descriptions

This section provides descriptions of certain functions and blocks that are not exclusively

related to either the radio or the audio part of the SAF7741HV.

7.8.1 Oscillator

The SAF7741HV has a low-power Pierce oscillator with amplitude control and an inverter

for the gain stage. The inverter biasing together with capacitive input coupling gives the

gain stage Class C operation. When the circuit is oscillating there are sine waves at the

input (osc_in) and at the output (osc_out) with Vpp close to the 1.8 V oscillator supply Vdd.

The sine wave at the input and the output is converted by a low-jitter comparator into a

CMOS-compatible clock.

The oscillator block diagram is shown in Figure 35. The crystal should be connected to the

PCB as close as possible to the oscillator input and output pins of the chip. Care must

also be taken to make sure that the load capacitors Cx1 and Cx2 and OSC_REF_N have

a common ground plain. Loops must be made as small as possible in order to minimize

noise coupling to the crystal nodes, and in addition parasitics should be kept as small as

possible.

Lx3 and Cx3 have to be added when the crystal is used at the third overtone frequency.

Table 20 gives specifications for fundamental and third-overtone frequency crystals. CL is

the typical load capacitance of the crystal and is usually specified by the manufacturer.

The actual CL influences the oscillation frequency. Using a crystal manufactured for a

different load capacitance will cause the circuit to oscillate at a slightly different frequency

(dependent on the quality of the crystal) from the specified one. Therefore, to obtain an

accurate time reference, it is advisable to use the load capacitors specified in Table 20. In

addition to start-up problems, the use of values other than those quoted can lead to

performance degradation due to an unstable clock reference.

Lx3 and Cx3 should be connected only in combination with 3rd overtone crystals

Fig 35. Oscillator block diagram

CLKOUT

ON CHIP

OFF CHIP

OSC OUT

Lx3

Cx2

Cx1

COMMON GROUND PLANE

Xtal

OSC IN

Rbias

AGC

COMP

Cx3

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