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AD5941 Datasheet(PDF) 9 Page - Analog Devices |
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AD5941 Datasheet(HTML) 9 Page - Analog Devices |
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9 / 134 page ![]() Data Sheet AD5940/AD5941 Rev. C | Page 9 of 134 Parameter Symbol Min Typ Max Unit Test Conditions/Comments Accuracy Magnitude −1.25 ±0.2 +1.25 % 20 kHz to 200 kHz ±0.2 % 10 Hz to 20 kHz ±1 % 1 Hz to <10 Hz Phase −0.3 ±0.1 +0.3 Degrees Three-Resistor Star Cell Accuracy R1 = R2 = R3 = 2.2 Ω (see Figure 18); 0.1 Hz to 200 kHz Magnitude ±0.5 % Phase ±0.5 Degrees Accuracy R1 = R2 = R3 = 100 Ω connected (see Figure 18); 0.1 kHz to 200 kHz Magnitude ±0.2 % Phase ±0.2 Degrees With High Bandwidth Loop, 50 kHz, 4-Wire Isolated For Z = 1 kΩ (0.1% tolerant resistor); excitation frequency = 50 kHz; sine amplitude = 0.6 V p-p; RTIA = 1 kΩ; CTIA = 32 pF; Isolation Capacitor 1 (CISO1) = 15 nF; Isolation Capacitor 2 (CISO2) = Isolation Capacitor 3 (CISO3) = Isolation Capacitor 4 (CISO4) = 470 nF; current-limiting resistor (RLIMIT) = 1 kΩ Accuracy Device to device repeatability for three devices at 50 kHz Magnitude 0.26 % Percentage error Phase 1 Degrees With Low Bandwidth Loop For Z = 100 kΩ; excitation frequency = 100 Hz; sine amplitude = 1.1 V p-p; RTIA = 100 kΩ; CTIA = 100 nF; CISO1 = 15 nF; CISO2 = 470 nF; RLIMIT = 1000 Ω Frequency Range 1 300 Hz Accuracy2 Device to device repeatability for three devices at 100 Hz Magnitude ±0.3 % Percentage error Precision2 Magnitude 450 Ω Standard deviation High Speed Loop See Figure 18; valid for impedance spectroscopy, voltammetry, and pulse tests Allowed External Load Capacitance2 100 pF R2 + R3 ≤ 100 Ω; R1 ≤ 100 Ω 50 pF R2 + R3 ≤ 500 Ω; R1 ≤ 100 Ω 40 pF R2 + R3 ≤ 1600 Ω; R1 ≤ 800 Ω; frequency ≥ 1 kHz Excitation Amplifier Bandwidth2 3 MHz Impedance Frequency Range2 0.015 200,00 0 Hz LOW POWER TIA AND POTENTIOSTAT Input Bias Current2 TIA Amplifier, SE0 Pin 80 200 pA Potentiostat Amplifier 20 150 pA Offset Voltage2 50 150 µV Offset Voltage Drift vs. Temperature 1 µV/°C Noise2 Unity-gain mode; V p-p in 0.1 Hz to 10 Hz range 1.6 µV Normal mode (LPTIACON0 Bit 2 = 0) 2 µV Half power mode (LPTIACON0 Bit 2 = 1) Potentiostat Source/Sink Current2 −750 +750 µA Normal mode (LPTIACON0 Bits[4:3] = 00); from CE0 −3 +3 mA High current mode (LPTIACON0 Bits[4:3] = 01 or 11 from CE0 |
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