HT46R53 datasheet(17/42 Pages) HOLTEK

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HT46R53/HT46R54

Rev. 1.40

July 12, 2005

PWM.7~PWM.2. The group 2 is denoted by AC which is

the value of PWM.1~PWM.0. In a (6+2) bits mode PWM

cycle, the duty cycle of each modulation cycle is shown

in the table.

Parameter

AC (0 3)

Duty Cycle

Modulation cycle i

(i=0~3)

iAC

DC+1

iAC

A (7+1) bits mode PWM cycle is divided into two modu-

lation cycles (modulation cycle0~modulation cycle 1).

Each modulation cycle has 128 PWM input clock period.

In a (7+1) bits PWM function, the contents of the PWM

PWM.7~PWM.1. The group 2 is denoted by AC which is

the value of PWM.0. In a (7+1) bits mode PWM cycle,

the duty cycle of each modulation cycle is shown in the

table.

Parameter

AC (0 1)

Duty Cycle

Modulation cycle i

(i=0~1)

iAC

DC+1

128

iAC

128

The modulation frequency, cycle frequency and cycle

duty of the PWM output signal are summarized in the

following table.

PWM

Modulation Frequency

PWM Cycle

Frequency

PWM Cycle

Duty

fSYS/64 for (6+2) bits mode

fSYS/128 for (7+1) bits mode

fSYS/256

[PWM]/256

f S Y S / 2

P W M

[ P W M ] = 1 0 0

[ P W M ] = 1 0 1

P W M

[ P W M ] = 1 0 2

P W M

[ P W M ] = 1 0 3

P W M

P W M c y c l e : 2 5 6 / f S Y S

2 5 / 6 4

2 6 / 6 4

2 5 / 6 4

2 6 / 6 4

2 5 / 6 4

2 6 / 6 4

2 5 / 6 4

2 6 / 6 4

M o d u l a t i o n c y c l e 0

P W M m o d u l a t i o n p e r i o d : 6 4 / f S Y S

M o d u l a t i o n c y c l e 1

M o d u l a t i o n c y c l e 2

M o d u l a t i o n c y c l e 3

M o d u l a t i o n c y c l e 0

(6 2) PWM Mode

f S Y S / 2

P W M

[ P W M ] = 1 0 0

[ P W M ] = 1 0 1

P W M

[ P W M ] = 1 0 2

P W M

[ P W M ] = 1 0 3

P W M

P W M m o d u l a t i o n p e r i o d : 1 2 8 / f S Y S

5 0 / 1 2 8

5 1 / 1 2 8

5 2 / 1 2 8

5 0 / 1 2 8

5 1 / 1 2 8

5 0 / 1 2 8

5 1 / 1 2 8

5 2 / 1 2 8

M o d u l a t i o n c y c l e 0

P W M c y c l e : 2 5 6 / f S Y S

M o d u l a t i o n c y c l e 1

M o d u l a t i o n c y c l e 0

(7 1) PWM Mode

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