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LTM4650 Datasheet(PDF) 11 Page - Analog Devices |
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LTM4650 Datasheet(HTML) 11 Page - Analog Devices |
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11 / 38 page ![]() LTM4652 11 Rev. 0 For more information www.analog.com PIN FUNCTIONS allowing the output voltage to rise high enough (~10% above nominal regulation) to induce an output overvolt- age response. Transient and sustained operation in this manner is strongly not recommended. Thus, in applications where transient and/or sustained negative (sinking) output current is expected, the LTM4652 must be operated in forced continuous mode. RUN1, RUN2 (Pins F5, F9): Run Control Pin. A voltage above 1.22V will turn on each channel in the module. A voltage below 1.085V (135mV hysteresis, typ.) on the RUN pin will turn off the related channel. Each RUN pin has a 1µA pull-up current, once the RUN pin reaches 1.22V an additional 4.5µA pull-up current is added to this pin. DIFFOUT (Pin F8): Internal Remote Sense Amplifier Output. Connect this pin to VOUTS1 or VOUTS2 depend- ing on which output is using remote sense. In parallel operation connect one of the VOUTS pin to DIFFOUT for remote sensing. SW1, SW2 (Pins G2, G11): Switching node of each chan- nel that is used for testing purposes. Also an R-C snubber network can be applied to reduce or eliminate switch node ringing, or otherwise leave floating. See the Applications Information section. PHASMD (Pin G4): Connect this pin to SGND, INTVCC, or floating this pin to select the phase of CLKOUT to 60 degrees, 120 degrees, and 90 degrees respectively. CLKOUT (Pin G5): Clock output with phase control using the PHASMD pin to enable multiphase operation between devices. See the Applications Information section. PGOOD1, PGOOD2 (Pins G9, G8): Output Voltage Power Good Indicator. Open drain logic output that is pulled to ground when the output voltage is not within ±10% of the regulation point. VINOVP (Pin H5): VIN Overvoltage Protection (OVP) Comparator Input. Internally, this pin connects to SGND through a 60.4k resistor. If desired, apply resistor RVINOVP from VIN to VINOVP to set VIN(OVP), the VIN overvoltage inception threshold. VIN(OVP) is given by Equation 1. 60.4k VIN(OVP) = 1.22V • 1 + RVINOVP (1) See Figure 1 and the Applications Information section. When VINOVP is detected (VVINOVP > 1.22V), all power MOSFETs in both channels are turned off and remain off until the module is restarted. The module can be restarted by either cycling the RUN pins below their RUN thresholds or cycling the TRACK pins to SGND. Leave VINOVP open circuit or connect to SGND when this feature is not used. TEMP– (Pin H6): Temperature Monitor, Negative Terminal. See TEMP+. INTVCC (Pin H8): Internal 5V Regulator Output. The con- trol circuits and internal gate drivers are powered from this voltage. Decouple this pin to PGND with a 4.7µF low ESR tantalum or ceramic. INTVCC is activated when either RUN1 or RUN2 is activated. TEMP+ (Pin J6): Temperature Monitor, Positive Terminal. An internal diode-configured PNP transistor connected between TEMP+ and TEMP– pins. See the Applications Information section. EXTVCC (Pin J7): External power input that is enabled through a switch to INTVCC whenever EXTVCC is greater than 4.7V. Do not exceed 6V on this input, and connect this pin to VIN when operating VIN on 5V. An efficiency increase will occur, corresponding to a power loss reduc- tion of (VIN – INTVCC) multiplied by power MOSFET driver current. Typical current requirement is 30mA. VIN must be applied before EXTVCC, and EXTVCC must be removed before VIN. VIN (Pins M2–M11, L2–L11, J2–J4, J9–J11, K2–K4, K9–K11): Power Input Pins. Apply input voltage between these pins and GND pins. Recommend placing input decoupling capacitance directly between VIN pins and GND pins. Heat Sink (Top Exposed Metal): The top exposed metal is electrically unconnected. (Recommended to use test points to monitor signal pin connections.) |
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