| Electronic Components Datasheet Search |
|
LTM4650 Datasheet(PDF) 28 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
LTM4650 Datasheet(HTML) 28 Page - Analog Devices |
|
28 / 38 page ![]() LTM4652 28 Rev. 0 For more information www.analog.com APPLICATIONS INFORMATION The derived thermal resistances in Table 2 to Table 4 for the various conditions can be multiplied by the calcu- lated power loss as a function of ambient temperature to derive temperature rise above ambient, thus maximum junction temperature. Room temperature power loss can be derived from the efficiency curves and adjusted with the above ambient temperature multiplicative factors. The printed circuit board is a 1.6mm thick four layer board with two ounce copper for all four layers. The PCB dimen- sions are 101mm × 114mm. The BGA heat sinks are listed in Table 5. Layout Checklist/Example The high integration of LTM4652 makes the PCB board layout very simple and easy. However, to optimize its electrical and thermal performance, some layout consid- erations are still necessary. • Use large PCB copper areas for high current paths, including VIN, GND, VOUT1 and VOUT2. It helps to min- imize the PCB conduction loss and thermal stress. • Place high frequency ceramic input and output capac- itors next to the VIN, PGND and VOUT pins to minimize high frequency noise. • Place a dedicated power ground layer underneath the unit. • To minimize the via conduction loss and reduce module thermal stress, use multiple vias for interconnection between top layer and other power layers. • Do not put via directly on the pad, unless they are capped or plated over. • Use a separated SGND ground copper area for com- ponents connected to signal pins. Connect the SGND to GND underneath the unit. • For parallel modules, tie the VOUT, VFB, and COMP pins together. Use an internal layer to closely connect these pins together. The TRACK pin can be tied a common capacitor for regulator soft-start. • Bring out test points on the signal pins for monitoring. Figure 30givesagoodexampleoftherecommended layout. Figure 30. Recommended PCB Layout A 1 2 VOUT1 VOUT2 GND SGND CNTRL 4652 F30 GND GND VIN 3 4 5 6 7 8 9 10 11 12 B C D E K L M F G H J COUT1 COUT2 CIN1 CIN2 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |