LTM4650 datasheet(22/38 Pages) AD

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LTM4652

Rev. 0

For more information www.analog.com

APPLICATIONS INFORMATION

SW Pins

The SW pins are generally for testing purposes by moni-

toring these pins. These pins can also be used to dampen

out switch node ringing caused by LC parasitic in the

switched current paths. Usually a series R-C combination

is used called a snubber circuit. The resistor will dampen

the resonance and the capacitor is chosen to only affect

the high frequency ringing across the resistor. If the stray

inductance or capacitance can be measured or approxi-

mated then a somewhat analytical technique can be used

to select the snubber values. The inductance is usually

easier to predict. It combines the power path board induc-

tance in combination with the MOSFET interconnect bond

wire inductance.

First the SW pin can be monitored with a wide bandwidth

scope with a high frequency scope probe. The ring fre-

quency can be measured for its value. The impedance Z

can be calculated using Equation 11.

Z(L) = 2πfL,

(11)

where f is the resonant frequency of the ring, and L is the

total parasitic inductance in the switch path. If a resistor

is selected that is equal to Z, then the ringing should be

dampened. The snubber capacitor value is chosen so that

its impedance is equal to the resistor at the ring frequency.

Calculated by: Z(C) = 1/(2πfC). These values are a good

place to start with. Modification to these components

should be made to attenuate the ringing with the least

amount of power loss.

Temperature Monitoring

A diode connected PNP transistor is used for the TEMP+/

TEMP– monitor function by monitoring its voltage over

temperature. The temperature dependence of this diode

voltage can be understood in Equation 12.

VD =nVT ln

⎛

⎝⎜

⎞

⎠⎟

(12)

where VT is the thermal voltage (kT/q), and n, the ideality

factor, is 1 for the diode connected PNP transistor being

used in the LTM4652. IS is expressed by the typical empir-

ical Equation 13.

IS =I0 exp

–VG0

⎛

⎝⎜

⎞

⎠⎟

(13)

where I0 is a process and geometry dependent current, (I0

is typically around 20k orders of magnitude larger than IS

at room temperature) and VG0 is the band gap voltage of

1.2V extrapolated to absolute zero or –273°C.

If we take the IS Equation 13 and substitute into the

Equation 14, then we get:

VD = VG0 –

⎛

⎝⎜

⎞

⎠⎟

⎛

⎝⎜

⎞

⎠⎟

, VT =

(14)

TEMPERATURE (°C)

–50 –25

0.3

0.5

0.8

0.4

0.7

0.6

100

4652 F11

125

ID = 100µA

Figure 11. Diode Voltage VD vs Temperature T(K)

for Different Bias Currents

The expression shows that the diode voltage decreases

(linearly if I0 were constant) with increasing temperature

and constant diode current. Figure 11 shows a plot of VD

vs Temperature over the operating temperature range of

the LTM4652.

If we take Equation 14 and differentiate it with respect to

temperature T, then Equation 15 gives:

dVD

= –

VG0 – VD

(15)

This dVD/dT term is the temperature coefficient equal to

about –2mV/K or –2mV/°C. Equation 15 is simplified for

the first order derivation.

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