WM8770 datasheet(14/52 Pages) WOLFSON

14 / 52 page

WM8770

Production Data

PD Rev 4.1 June 2005

INTERNAL POWER ON RESET CIRCUIT

Figure 9 Internal Power On Reset Circuit Schematic

The WM8770 includes an internal Power On Reset Circuit which is used to reset the digital logic into

a default state after power up.

Figure 9 shows a schematic of the internal POR circuit. The POR circuit is powered from AVDD. The

circuit monitors DVDD and VMIDADC and asserts PORB low if DVDD or VMIDADC are below the

minimum threshold Vpor_off.

On power up, the POR circuit requires AVDD to be present to operate. PORB is asserted low until

AVDD, DVDD and VMIDADC are established. When AVDD, DVDD, and VMIDADC have been

established, PORB is released high, all registers are in their default state and writes to the digital

interface may take place.

On power down, PORB is asserted low whenever DVDD or VMIDADC drop below the minimum

threshold Vpor_off.

If AVDD is removed at any time, the internal Power On Reset circuit is powered down and PORB will

follow AVDD.

In most applications the time required for the device to release PORB high will be determined by the

charge time of the VMIDADC node.

WM8770 Datasheet(PDF) 14 Page - Wolfson Microelectronics plc