WM8770 datasheet(25/52 Pages) WOLFSON

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Production Data

WM8770

PD Rev 4.1 June 2005

3-WIRE (SPI COMPATIBLE) SERIAL CONTROL MODE

DI is used for the program data, CL is used to clock in the program data and CE is used to latch the

program data. DI is sampled on the rising edge of CL. The 3-wire interface protocol is shown in

Figure 21.

Figure 21 3-wire SPI compatible Interface

B[15:9] are Control Address Bits

B[8:0] are Control Data Bits

CE is edge sensitive – the data is latched on the rising edge of CE.

CCB INTERFACE MODE

CCB Interface mode allows multiple devices to be controlled off a common 3-wire bus. Each device

on the 3-wire bus has its own identifying address. The WM8770 supports write only CCB interface

mode.

DI is used for the device address and program data and CL is used to clock in the address and data

on DI. DI is sampled on the rising edge of CL. CE indicates whether the data on DI is the device

address or program data. The eight clocks before a rising edge on CE will clock in the device

address. The device address is latched on the rising edge of CE. The sixteen clocks before a falling

edge on CE will clock in the program data. The program data is latched on the falling edge of CE.

D14

D15

Figure 22 CCB Interface – CL stopped low

Figure 23 CCB Interface – CL stopped high

A[7:0] are Device Address bits

D[15:9] are Control Address bits

D[8:0] are Control Data bits

The address A[7:0] for WM8770 is 8Ch (10001100).

B15

B14

B13

B12

B11

B10

D14

D15

WM8770 Datasheet(PDF) 25 Page - Wolfson Microelectronics plc