MPC8540 datasheet(842/1302 Pages) FREESCALE

842 / 1302 page

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

16-20

Freescale Semiconductor

PCI/PCI-X Bus Interface

See Section 16.4.2.11.2, “Accessing the PCI Configuration Space in Host Mode,” and

Section 16.4.2.11.3, “PCI Configuration in Agent and Agent Lock Modes,” for use of

CFG_DATA.

16.3.1.1.3 PCI/X Interrupt Acknowledge Register (INT_ACK)

An external PCI/X interrupt acknowledge transaction is generated by reading the INT_ACK

nothing. The INT_ACK register is shown in Figure 16-5.

Figure 16-5. PCI/X INT_ACK Register

Table 16-6 describes the bit settings for the INT_ACK register.

16.3.1.2 PCI/X ATMU Outbound Registers

The outbound address translation and mapping unit controls the mapping of transactions from the

internal 32-bit address space of the MPC8540 to the external PCI address space. The outbound

ATMU consists of four translation windows plus a default translation for transactions that do not

hit in one of the four windows.

Each window contains a base address that points to the beginning of the window in the local

address map, a translation address that specifies the high-order bits of the transaction in the

external PCI address space, and a set of attributes including window size and external transaction

type.

Each window must be aligned based on the granularity specified by the window size. If two

outbound ATMU windows overlap in the local address space, the mapping of the lower numbered

window has precedence over the higher numbered window. Note that outbound translation

windows must not overlap the configuration access registers.

Window 0 is the default window and is the only window enabled upon reset. The default outbound

RData

Reset

0000_0000_0000_0000_0000_0000_0000_0000

Offset

0x0_8008

Table 16-6. PCI/X INT_ACK Field Descriptions

Bits

Name

Description

0–31

Data

A read to this register generates a PCI interrupt acknowledge cycle.

MPC8540 Datasheet(PDF) 842 Page - Freescale Semiconductor, Inc