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ADC32RF55 Datasheet(PDF) 39 Page - Texas Instruments

Part # ADC32RF55
Description  ADC32RF5x Dual Channel 14-bit 2.6 to 3-GSPS RF Sampling Data Converter
PDF  126 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

ADC32RF55 Datasheet(HTML) 39 Page - Texas Instruments

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7 Detailed Description
7.1 Overview
The ADC32RF5x is a single core (non-interleaved) 14-bit, 2.6 GSPS to 3 GSPS, dual channel analog to digital
converter (ADC). The design maximizes signal-to-noise ratio (SNR) and delivers a noise spectral density of -155
dBFS/Hz. Additional internal ADCs can be used for on-chip averaging (2x and 4x) to further improve the noise
density to as low as -161 dBFS/Hz.
The analog signal input is non-buffered to save power consumption with a nominal differential input impedance
of 100 Ω. The full power input bandwidth is 2.75 GHz (-3 dB) and the device supports direct RF sampling with
input frequencies in the through the L-band. The device is designed for low residual phase noise to support high
performance radar applications. The sampling clock input has a dedicated power supply input which requires a
very clean power supply.
Each ADC channel can be connected to a quad-band digital down-converter (DDC) using a 48-bit NCO which
supports phase coherent frequency hopping. Using the GPIO pins for NCO frequency control, frequency hopping
can be achieved in less than 1 µs. The digital down converters support a wide range of instantaneous bandwidth
(IBW) coverage - from single wide band mode with 4x complex decimation to up to four narrow bandwidth
channels with as high as 128x complex decimation.
The ADC32RF5x supports the JESD204B serial data interface with subclass 1 deterministic latency using data
rates up to 13.0 Gbps. In bypass mode, 14-bit output is supported up to a sampling rate of 2.6 Gsps. From 2.6
to 3 Gsps a 12-bit interface with more efficient data packing can be used at expense of quantization noise. When
using decimation the output is 16-bit.
7.2 Functional Block Diagram
N
N
DDC
NCO
N
N
DDC
NCO
N
N
DDC
NCO
INA1P/M
SYSREFP/M
CLKP/M
100
3Gsps
ADC
DOUT0P/M
ADC
100
3Gsps
ADC
ADC
100
3Gsps
ADC
ADC
INB1P/M
100
3Gsps
ADC
ADC
N
N
DDC
NCO
INA2P/M
INB2P/M
N
N
DDC
NCO
N
N
DDC
NCO
N
N
DDC
NCO
N
N
DDC
NCO
DOUT3P/M
DOUT4P/M
DOUT7P/M
SEN
SCLK
SDIO
GPIO1 GPIO2
RESETb
SPISEL
SPI Registers and
Device Control
www.ti.com
ADC32RF54, ADC32RF55
SBAS500A – JUNE 2022 – REVISED DECEMBER 2022
Copyright © 2022 Texas Instruments Incorporated
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Product Folder Links: ADC32RF54 ADC32RF55



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