Preliminary Technical Data

AD5628/AD5648/AD5668

Rev. PrA| Page 19 of 24

Reference Setup –External to Internal

The on-board reference is turned off at power-up by default. This allows the use of an external reference. The AD5628/48/68 have an on-

chip reference with an internal gain of two. The AD56x8-1 has a 1.25V 10ppm/°C max reference and the AD56x8-2,-3 have a 2.5V

10ppm/°C max reference. The on-board reference can be turned on/off through a software executable REF Setup function, see Table 3.

Command 1000 is reserved for this REF Setup function, see Table 1. The reference mode is software-programmable by setting a bit

(DB0) in the REF Setup register.

Table 4 shows how the state of the bits corresponds to the mode of operation of the device.

REF Setup Register

(DB0)

Action

0

Ref Off (Default)

1

Ref On

Table 3. Reference Set-up Register

MSB

LSB

DB31 –

DB28

DB27

DB26

DB25

DB24

DB23

DB22

DB21

DB20

DB1-

DB19

DB0

x

1

0

0

0

x

x

x

x

x

1/0

Don’t

Cares

COMMAND BITS (C3-C0)

ADDRESS BITS (A3 – A0)

Don’t

Cares

REF Setup

Register

Table 4 32-Bit Input Shift Register Contents for Reference Setup Function

Power-On-Reset

The AD5628/AD5648/AD5668 family contains a power-on-reset circuit that controls the output voltage during power-up. The

AD5628/AD5648/AD5668x-1/2 DAC output powers up to zero volts and the AD5668-3 DAC output powers up to midscale. The output

remains there until a valid write sequence is made to the DAC. This is useful in applications where it is important to know the state of the

output of the DAC while it is in the process of powering up.

There is also a software executable Reset function that will reset the DAC to the Power-on -Reset code. Command 0111 is reserved for

this Reset function, see Table 1.

Power-Down Modes

The AD5628/AD5648/AD5668 contains four separate modes of operation. Command 0100 is reserved for the Power-Down function,

see Table 1. These modes are software-programmable by setting two bits (DB9 and DB8) in the control register.

Table 5 shows how the state of the bits corresponds to the mode of operation of the device. Any or all DACs, (DacH to DacA) may be

powered down to the selected mode by setting the corresponding 8 bits (DB7 to DB0) to a “1”. See Table 6 for contents of the Input

Shift Register during power down/up operation.

When both bits are set to 0, the part works normally with its normal power consumption of 250 µA at 5 V. However, for the three power-