AD5628/AD5648/AD5668

Preliminary Technical Data

Rev.PrA | Page 20 of 24

down modes, the supply current falls to 200 nA at 5 V (50 nA at 3 V). Not only does the supply current fall but the output stage is also

internally switched from the output of the amplifier to a resistor network of known values. This has the advantage that the output

impedance of the part is known while the part is in power-down mode. There are three different options. The output is connected

internally to GND through a 1 kΩ resistor, a 100 kΩ resistor or it is left open-circuited (Tri-State). The output stage is illustrated in

figure 24.

The bias generator of selected DAC(s), the output amplifier, the resistor string and other associated linear circuitry are all shut down

when the power-down mode is activated. However, the contents of the DAC register are unaffected when in power-down. The time to exit

Any combination of DACs can be powered up by setting PD1 and PD0 to “0” (normal operation). Output powers-up to value in input

register (/LDAC Low) or to value in DAC register before Power-Down (/LDAC High).

DB9

DB8

Operating Mode

0

0

Normal Operation

Power Down Modes

0

1

1 kΩ to GND

1

0

100 kΩ to GND

1

1

Tri State

Table 5. Modes of Operation for the AD5628/AD5648/AD5668

MSB

LSB

DB31

–

DB28

DB27

DB26

DB25

DB24

DB23

DB22

DB21

DB20

DB10—

DB19

DB9

DB8

DB7

DB6

DB5

DB4

DB3

DB2

DB1

DB0

x

0

1

0

0

x

x

x

x

x

PD1

PD0

DacH

DacG

DacF

DacE

DacD

DacC

DacB

DacA

Don’t

Cares

COMMAND BITS (C2-C0)

ADDRESS BITS (A3 – A0)

Don’t cares

Don’t

Cares

Power

Down Mode

Power Down/Up Channel Selection – Set Bit to a “1” to select

Table 6. 32-Bit Input Shift Register Contents for Power Down/Up Function