F1978 Datasheet

© 2017 Integrated Device Technology, Inc.

6

Rev O August 28, 2017

Electrical Characteristics

The specifications in Table 4 apply at VDD = +3.3V, TEP = +25°C, fRF = 1000MHz, PIN = 0dBm, Serial Mode, ZS = ZL = 75Ω, Evaluation Board

(EVKit) trace and connector losses are de-embedded, unless otherwise noted.

Table 4.

Electrical Characteristics

Parameter

Symbol

Condition

Minimum

Typical

Maximum

Units

Logic Input High Threshold

VIH

All control pins

VDD > 3.6V

1.17 [a]

3.6

V

3.0V ≤ VDD ≤ 3.6V

1.17

VDD

Logic Input Low Threshold

VIL

All control pins

0.63

V

Logic Current

IIH, IIL

All control pins

-35

+35

µA

Supply Current [b]

IDD

VDD = 3.3V

550

830

µA

VDD = 5.0V

620

900

RF1 Return Loss

S11

18

dB

RF2 Return Loss

S22

18

dB

Attenuation Step

LSB

Least significant bit

0.5

dB

Insertion Loss

(Minimum Attenuation)

AMIN

D[5:0]=[000000BIN] (IL State)

1.2

2.0

dB

Attenuation Range

ARANGE

D[5:0]=[111111BIN]=31.5dB

30.5

31.1

31.7

dB

Step Error

DNL

0.1

dB

Absolute Error

INL

D[5:0]=[100111BIN]= 19.5dB

-0.7

+0.5

dB

Insertion Phase Delta

ΦΔ

fRF = 0.5GHz (AMAX to AMIN)

10

deg

fRF = 1.0GHz (AMAX to AMIN)

20

Input IP3

IIP3

PIN = +10dBm/tone,

f1 = 900MHz, f2 = 950MHz

Attn = 0.0dB, RFIN = RF1

60

64

dBm

Attn =15.5dB, RFIN = RF1

59

62

[a] Specifications in the minimum/maximum columns that are shown in bold italics are guaranteed by test. Specifications in these columns

that are not shown in bold italics are guaranteed by design characterization.

[b] Current is tested using the Serial Mode with parallel pins floating. If parallel pins are grounded, add 25µA per pin.