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DA9130 Datasheet(PDF) 17 Page - Renesas Technology Corp |
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DA9130 Datasheet(HTML) 17 Page - Renesas Technology Corp |
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17 / 46 page ![]() DA9130 High-Performance, 10 A, Dual-Phase DC-DC Converter for Mobile and Portable Applications Datasheet Revision 2.1 14-Apr-2022 CFR0011-120-00 17 of 45 © 2022 Renesas Electronics 4 Functional Description 4.1 DC-DC Buck Converter DA9130 operates as a single-channel dual-phase buck converter capable of delivering up to 10 A output current at a 0.3 V to 1.9 V output voltage range. The buck converter has two voltage registers. One defines the normal output voltage, while the other offers an alternative retention voltage. In this way, different application power modes can easily be supported. The voltage selection can be operated either via GPI or via control interface to guarantee the maximum flexibility according to the specific host processor status in the application. When a buck is enabled, its output voltage is monitored and a power good signal indicates that the buck output voltage has reached a level higher than the VTHR_PG_HYS threshold. The power good status is lost when the voltage drops below VTHR_PG_DWN or increases above VTHR_HV. The status of the power good indicator can be read back via I2C from the PG1 status bit. It can be also individually assigned to any of the GPIOs by setting the GPIO mode registers to PG1 output. The buck converter is capable of supporting DVC transitions that occur when: ● the active and selected A- or B-voltage is updated to a new target value ● the voltage selection is changed from the A- to B-voltage (or B- to A-voltage) using CH1_VSEL The DVC controller operates in pulse width modulation (PWM) mode with synchronous rectification. The slew rate of the DVC transition is programmed at 10 mV per 8 µs, 4 µs, 2 µs, 1 µs, or 0.5 µs in register bits CH1_SR_DVC. A pull- down resistor (typically 150 Ω) for each phase is always activated unless it is disabled by setting register bits CH1_PD_DIS to 1. 4.1.1 Switching Frequency The buck switching frequency, nominally 4 MHz, can be tuned using register bit OSC_TUNE. The internal 8 MHz oscillator frequency is tuned in ±160 kHz steps. This impacts the buck converter frequency in steps of 80 kHz and helps to mitigate possible disturbances to other high frequency systems in the application. 4.1.2 Operation Modes and Phase Selection The buck converters can operate in PWM and PFM modes. The operating mode is selected using register bits CH1_<A or B>_MODE. Phase shedding automatically changes between 1- and 2-phase operation at a typical current of 2.0 A. If the automatic operation mode is selected on CH1_<A or B>_MODE, the buck converter automatically changes between synchronous PWM mode and PFM depending on the load current. This improves the efficiency across the whole range of output load currents. 4.1.3 Output Voltage Selection The switching converter can be configured using the I2C interface. Two output voltages can be pre-configured in registers CH1_<A or B>_VOUT. The output voltage can be selected by either toggling register bit CH1_VSEL or by re-programming the selected voltage control register. Both changes will result in ramped voltage transitions. After being enabled, the buck converter will, by default, use the register settings in CH1_A_VOUT unless the output voltage selection is configured via the GPI port. Registers CH1_VMAX limit the output voltage that can be set for each of the respective buck converters. |
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