DLPA2000 datasheet(52/68 Pages) TI

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(2)

The crystal bias is determined by the controllers VCC_INTF voltage rail, which is variable (not the VCC18 rail).

If an external oscillator is used, then the oscillator output must drive the PLL_REFCLK_I pin on the DLPC34xx

controller, and the PLL_REFCLK_O pin must be left unconnected.

Table 10-3. Recommended Crystal Parts

MANUFACTURER

(1) (2)

PART NUMBER

SPEED

(MHz)

TEMPERATURE

AND AGING

(ppm)

MAXIMUM

ESR (Ω)

LOAD

CAPACITANCE

(pF)

PACKAGE

DIMENSIONS

(mm)

KDS

DSX211G-24.000M-8pF-50-50

±50

120

2.0 × 1.6

Murata

XRCGB24M000F0L11R0

±100

120

2.0 × 1.6

NDK

NX2016SA 24M

EXS00A-CS05733

±145

120

2.0 × 1.6

(1)

The crystal devices in this table have been validated to work with the DLPC34xx controller. Other devices may also be compatible but

have not necessarily been validated by TI.

(2)

Operating temperature range: –30°C to 85°C for all crystals.

10.1.3 Unused Pins

To avoid potentially damaging current caused by floating CMOS input-only pins, TI recommends tying unused

controller input pins through a pullup resistor to its associated power supply or a pulldown resistor to ground.

For controller inputs with internal pullup or pulldown resistors, it is unnecessary to add an external pullup or

pulldown unless specifically recommended. Note that internal pullup and pulldown resistors are weak and should

not be expected to drive an external device. The DLPC34xx controller implements very few internal resistors and

are listed in the tables found in the Pin Configuration and Functions section. When external pullup or pulldown

resistors are needed for pins that have weak pullup or pulldown resistors, choose a maximum resistance of 8

kΩ.

Never tie unused output-only pins directly to power or ground. Leave them open.

When possible, TI recommends that unused bidirectional I/O pins are configured to their output state such that

the pin can remain open. If this control is not available and the pins may become an input, then include an

appropriate pullup (or pulldown) resistor.

10.1.4 DMD Control and Sub-LVDS Signals

Table 10-4. Maximum Pin-to-Pin PCB Interconnect Recommendations

DMD BUS SIGNAL(1) (2)

SIGNAL INTERCONNECT TOPOLOGY

UNIT

SINGLE-BOARD SIGNAL

ROUTING LENGTH

MULTI-BOARD SIGNAL

ROUTING LENGTH

DMD_HS_CLK_P

DMD_HS_CLK_N

6.0

(152.4)

See (3)

(mm)

DLPC3436

DLPS156E – JANUARY 2019 – REVISED APRIL 2023

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