TMP1827 datasheet(17/65 Pages) TI

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the value '00b', the device decodes the address resistor connected on ADDR pin or IOs or both of them and

overlay on the short address register. This is helpful as the same set of 16 resistors or 16 IO combinations can

be used for up to 256 unique flexible address.

The FLEX_ADDR_MODE is not stored in the configuration EEPROM, therefore the host must copy the short

address register content into EEPROM configuration memory to make the short address values permanent

without the need to decode at every power up.

9.3.8.1 Non-Volatile Short Address

Figure 9-4 shows the user-programmable, 8-bit short address mode of the device. The host must copy the 8-bit

short address to the configuration EEPROM, so that at subsequent power up, the device loads the updated short

address and respond to the host.

MSb

LSb

Bit-7

Bit-0

NV0

NV1

NV2

NV3

NV4

NV5

NV6

NV7

Figure 9-4. Non-Volatile Short Address

9.3.8.2 IO Hardware Address

Figure 9-5 shows the 8-bit IO hardware address mode of the device. This feature is available on packages

which have general-purpose pins (IO0-IO3) available. The 8-bit value consists of the lower 4 bits as read values

of the pins (IO3 to IO0) that is overlaid on the contents of the short address register to form a 8-bit address.

The application may connect the general-purpose pins to either VDD/SDQ for logic '1' or GND for logic '0'. TI

recommends to use a 20 KΩ resistor to be placed between the IO and VDD/SDQ to prevent a supply shot in case

the IO pin is accidentally set to zero in output mode.

After having FLEX_ADDR_MODE as '00b', the host must set the bits as '01b' in the device configuration-2

MSb

LSb

Bit-7

Bit-0

IO0

IO1

IO2

IO3

NV4

NV5

NV6

NV7

Figure 9-5. IO Hardware Address

Note

IO pins must be configured as input before using IO hardware address mode. If any of the IO0 to IO3

pins are used in output mode, then the respective value shall be latched as '0'.

9.3.8.3 Resistor Address

The resistor address modes uses E96-series (1% tolerance) standard resistor connected between the ADDR pin

and ground. Figure 9-6 shows the 8-bit address with the lower 4 bits decoded from the resistor connected, which

is overlaid on the contents of the short address register.

MSb

LSb

Bit-7

Bit-0

RA0

RA1

RA2

RA3

NV4

NV5

NV6

NV7

Figure 9-6. Resistor Address

After having FLEX_ADDR_MODE as '00b', the host controller must set the bits as '10b' in the device

configuration-2 register which enables the device to decode the resistor connected. After writing the device

configuration-2 register, the host must place the device in shut down mode and idle the bus for tRESDET, for

the device to decode the resistor address. Table 9-3 shows the set value of the device address based on the

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TMP1827

SBOSA15A – SEPTEMBER 2022 – REVISED MAY 2023

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