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S71GS256 Datasheet(PDF) 124 Page - SPANSION

Part # S71GS256
Description  128N based MCPs
PDF  195 Pages
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Manufacturer  SPANSION [SPANSION]
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S71GS256 Datasheet(HTML) 124 Page - SPANSION

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CellularRAM Type 2
cellRAM_00_A0 October 4, 2004
Advan ce
In form ati o n
Deep Power-Down (RCR[4]): Default = DPD Disabled
The deep power-down bit enables and disables all refresh-related activity. This
mode is used if the system does not require the storage provided by the Cellular-
RAM device. Any stored data will become corrupted when DPD is enabled. When
refresh activity has been re-enabled, the CellularRAM device will require 150µs
to perform an initialization procedure before normal operations can resume.
Deep power-down is enabled when RCR[4] = 0, and remains enabled until
RCR[4] is set to “1.”
Temperature Compensated Refresh (RCR[6:5]): Default = +85ºC
Operation
The TCR bits allow for adequate refresh at four different temperature thresholds
(+15ºC, +45ºC, +70ºC, and +85ºC). The setting selected must be for a temper-
ature higher than the case temperature of the CellurlarRAM device. If the case
temperature is +50ºC, the system can minimize self refresh current consumption
by selecting the +70ºC setting. The +15ºC and +45ºC settings would result in
inadequate refreshing and cause data corruption.
Page Mode Operation (RCR[7]): Default = Disabled
The page mode operation bit determines whether page mode is enabled for asyn-
chronous READ operations. In the power-up default state, page mode is disabled.
Table 24. 64Mb Address Patterns for PAR (RCR[4] = 1)
RCR[2]
RCR[1]
RCR[0]
ACTIVE SECTION
ADDRESS SPACE
SIZE
DENSITY
0
0
0
Full die
000000h–3FFFFFh
4 Meg x 16
64Mb
0
0
1
One-half of die
000000h–2FFFFFh
3 Meg x 16
48Mb
0
1
0
One-quarter of die
000000h–1FFFFFh
2 Meg x 16
32Mb
0
1
1
One-eighth of die
000000h–0FFFFFh
1 Meg x 16
16Mb
1
0
0
None of die
0
0 Meg x 16
0Mb
1
0
1
One-half of die
100000h–3FFFFFh
3 Meg x 16
48Mb
1
1
0
One-quarter of die
200000h–3FFFFFh
2 Meg x 16
32Mb
1
1
1
One-eighth of die
300000h–3FFFFFh
1 Meg x 16
16Mb
Table 25. 32Mb Address Patterns for PAR (RCR[4] = 1)
RCR[2]
RCR[1]
RCR[0]
ACTIVE SECTION
ADDRESS SPACE
SIZE
DENSITY
0
0
0
Full die
000000h–1FFFFFh
2 Meg x 16
32Mb
0
0
1
One-half of die
000000h–17FFFFh
1.5 Meg x 16
24Mb
0
1
0
One-quarter of die
000000h–0FFFFFh
1 Meg x 16
16Mb
0
1
1
One-eighth of die
000000h–07FFFFh
512K x 16
8Mb
1
0
0
None of die
0
0 Meg x 16
0Mb
1
0
1
One-half of die
080000h–1FFFFFh
1.5 Meg x 16
24Mb
1
1
0
One-quarter of die
100000h–1FFFFFh
1 Meg x 16
16Mb
1
1
1
One-eighth of die
180000h–1FFFFFh
512K x 16
8Mb



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