S71GS256 datasheet(180/195 Pages) SPANSION

180 / 195 page

180

CellularRAM-2A

cellRAM_02_A0 December 15, 2004

Advan ce

In form ati o n

tering the refresh parameters can dramatically reduce current consumption

during standby mode. Page mode control is also embedded into the configuration

is set to 0070h.

Figure 69. Load Configuration Register Operation

Partial Array Refresh (CR[2:0]) Default = Full Array Refresh

The PAR bits restrict refresh operation to a portion of the total memory array. This

feature allows the system to reduce current by only refreshing that part of the

memory array required by the host system. The refresh options are full array,

three-quarters array, one-half array, one-quarter array, or none of the array. The

mapping of these partitions can start at either the beginning or the end of the

address map (see Table 68 on page 181).

Sleep Mode (CR[4]) Default = PAR Enabled, DPD Disabled

The sleep mode bit determines which low-power mode is to be entered when ZZ#

is driven LOW. If CR[4] = 1, PAR operation is enabled. If CR[4] = 0, DPD opera-

tion is enabled.

DPD operation disables all refresh-related activity. This mode will be used when

the system does not require the storage provided by the CellularRAM device. Any

stored data will become corrupted when DPD is enabled. When refresh activity

has been re-enabled, the CellularRAM device will require 150µs to perform an ini-

tialization procedure before normal operation can resume.

Temperature Compensated Refresh (CR[6:5]) Default = +85°C Operation

The TCR bits allow for adequate refresh at four different temperature thresholds:

+15°C, +45°C, +70°C, and +85°C. The setting selected must be for a tempera-

ture higher than the case temperature of the CellularRAM device. If the case

temperature is +50°C, the system can minimize self refresh current consumption

by selecting the +70°C setting. The +15°C and +45°C settings would result in

inadequate refreshing and cause data corruption.

Page Mode READ Operation (CR[7]) Default = Disabled

The page mode operation bit determines whether page mode READ operations

are enabled. In the power-up default state, page mode is disabled.

ADDRESS VALID

CE#

ZZ#

WE#

t < 500ns

ADDRESS

S71GS256 Datasheet(PDF) 180 Page - SPANSION