EPCS4 datasheet(14/32 Pages) ALTERA

14 / 32 page

4–14

Core Version a.b.c variable

Altera Corporation

Configuration Handbook, Volume 2

July 2004

Serial Configuration Device Memory Access

available when all the block protect bits are

0. When any of the block

protect bits are set to one, the relevant area is protected from being

written by write bytes operations or erased by erase sector operations.

The status register can be read at any time, even while a write or erase

cycle is in progress. When one of these cycles is in progress, you can check

the write in progress bit (bit

0 of the status register) before sending a new

operation to the device. The device can also read the status register

continuously, as shown in Figure 4–9.

Table 4–9. Block Protection Bits in EPCS4 Devices

Status Register Content

Memory Content

BP2 Bit

BP1 Bit

BP0 Bit

Protected Area

Unprotected Area

None

All eight sectors: 0 to 7

Sector 7

Seven sectors: 0 to 6

Sectors 6 and 7

Six sectors: 0 to 5

Four sectors: 4 to 7

Four sectors: 0 to 3

All sectors

None

All sectors

None

All sectors

None

All sectors

None

Table 4–10. Block Protection Bits in EPCS1

Status Register Content

Memory Content

BP1 Bit

BP0 Bit

Protected Area

Unprotected Area

None

All four sectors: 0 to 3

Sector 3

Three sectors: 0 to 2

Two sectors: 2 and 3

Two sectors: 0 and 1

All sectors

None

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