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UPC1876 Datasheet(PDF) 16 Page - Renesas Technology Corp

Part # UPC1876
Description  BIPOLAR ANALOG INTEGRATED CIRCUIT
PDF  42 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

UPC1876 Datasheet(HTML) 16 Page - Renesas Technology Corp

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µPC1876
14
Data Sheet S11666EJ4V0DS00
2.1
Stereo Demodulation Block
(1) Stereo LPF
Filter eliminates the Sub Audio Program (SAP) signal (5 fH) and telemetry signal (6.5 fH) residing anywhere around
5 to 6 fH.
The internal L–R demodulator, which uses the double-balanced circuit, demodulates L–R signal by multiplication
of L–R signal with the signal at L–R carrier frequency (2 fH). The L–R signal tends to be interfered by the 6 fH
signal because a square waveform is used as the switching carrier in this method. To eliminate the interference,
the
µPC1876 incorporates 5 fH and 6 fH traps.
Adjust the current value output from the FLTA pin for the filter response.
(2) Stereo phase comparator
The 8 fH signal generated at the stereo VCO is divided by 8 (4
× 2) and then multiplies it with the pilot signal passed
through the stereo LPF. The two signals differ from each other by 90 degrees in terms of phase.
The resistor and capacitor connected to the
φD1 and φD2 pins form a filter which smoothes the phase error signal
output from the phase comparator, converting the error signal to the DC voltage. When the voltage difference
between the
φ D1 and φD2 pins becomes 0 V (strictly speaking, not 0 V by the internal offset voltage), the stereo
VCO runs at 8 fH.
The lag/lead filter externally connected to the
φD1, φD2 pins determines the capture range.
(3) Stereo VCO
Runs at 8 fH with the internal capacitor. Adjust the current value output from the STVA pin for the frequency.
(4) Divider (Flip-flop)
Produces the inphase fH signal and the fH signal which is different 90 degrees from the input pilot signal by dividing
the 8 fH frequency by 4
× 2 from the stereo VCO.
(5) Pilot discrimination phase comparator (Level detector)
Multiplies the pilot signal from the COM pin with the inphase fH signal from the divider. The produced signal is
applied to the external filter connected to the PD1, PD2 pins. The signal is smoothed out to make DC voltage
for judging whether to turn on or off the stereo LED.
(6) Pilot canceller
The fH signal from the divider is added in the stereo signal at the resistor matrix depending on the level of the
input pilot signal to cancel the pilot signal.
(7) L+R LPF
This LPF, having traps at fH and 24 kHz each, allows only the monaural signal to pass through. The filter response
is adjusted by the current value output from the FLTA pin.
(8) De-emphasis
75
µs de-emphasis filter for the monaural signal. The filter response is adjusted by the current value output from
the FLTA pin.
(9) L–R AM demodulator
Demodulates the L–R AM-DSB modulated signal by multiplying with the 2fH signal which is synchronized to the
pilot signal. The 2 fH square wave is used as the switching carrier.



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