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RT3624LE Datasheet(PDF) 44 Page - Richtek Technology Corporation |
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RT3624LE Datasheet(HTML) 44 Page - Richtek Technology Corporation |
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44 / 48 page ![]() RT3624LE Copyright © 2022 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation www.richtek.com DS3624LE-00 April 2022 44 Table 17. Summary of Over Voltage Protection VID Condition OVP Threshold Example Protection Flag Protection Action Protection Reset VID=0 OVP is masked. VREF=1V VCC/VRON Toggle DVID up period from 0V to 1st PWM pulse after VID settles 2.45V VR_READY latched low. The output voltage is pulled down to below 2.1V and then ramps down to 0V. DVID period from non-zero VID VID+350mV if VID >1.0V, 1.35V if VID ≤1.0V VID = 1.2V, OVP threshold = 1.55V VID = 0.9V, OVP threshold = 1.35V VR_READY latched low. The output voltage is pulled down to below VID and then ramps down to 0V. VID ≠0 VID+350mV if VID >1.0V, 1.35V if VID ≤1.0V VID = 1.2V, OVP threshold = 1.55V VID = 0.9V, OVP threshold = 1.35V OVP Threshold VSEN VR_READY VID Down (Slow Slew rate) Indicator 60 μs PWM 0V 2.45V 2.1V Figure 23. Over-Voltage Protection Mechanism for DVID up from 0V |
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