RNBD451 datasheet(44/67 Pages) MICROCHIP

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RNBD451

Basic Connection Requirement

and its subsidiaries

Advance Information Data Sheet

DS70005514A-page 44

• Device programming and debugging

Pulling the NMCLR pin low generates a device Reset. For more details on the typical NMCLR circuit, see Figure 5-1.

The module has sufficient filtering (0.1 μF) and pull-up (10k) on the Reset line. On a typical application, no extra

filtering is required on this pin.

5.3

Unused I/O Pins

The recommendation is not to allow the unused I/O pins to float as inputs. The user can configure them as inputs and

pulled up. Alternatively, depending on the application, they can be pulled down as well.

5.3.1

GPIO Pins Functions

Most of the RNBD451 module pins can be configured as GPIOs pins. To find the functionality supported by each

of these GPIOs, see Table 3-1. It is recommended to add a series resistor on the host board for all critical, high

frequency pins and clocks for EMI considerations GPIOs. The value of the series resistor depends on the actual

pin configuration. These resistors must be placed close to the module. For the placement of the series resistor, see

Figure 6-2.

5.4

Interface Pins

The following illustrates the power scheme using a 3.3V low-dropout regulator to the RNBD451 module and a host

MCU. This scheme ensures using the same voltage for both the module and the MCU.

Figure 5-2. Power Scheme

RNBD451

LDO

(3.3V)

TXD

I/Os

RXD

VDD

MCU

Control and

Indication I/Os

(Note 2 and Note 3)

Vin

VDD

(1.9~3.6V)

I/O

NMCLR

RTS

CTS

CTS (4)

RTS (4)

Notes:

Ensure VDD_IO and MCU VDD voltages are compatible.

Control and indication ports are configurable.

To implement low-power operation, enable the UART RX indication pin, connect to host MCU and control.

These connectivities are optional and needed only when there is a need for UART flow control.

RNBD451 Datasheet(PDF) 44 Page - Microchip Technology

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