WM8986GECOSLASHV datasheet(61/87 Pages) WOLFSON

61 / 87 page

Pre-Production

WM8986

PP, Rev 3.1, February 2007

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R9 (09h)

GPIO control

JD_EN

Jack Detection Enable

0 = disabled

1 = enabled

3:0

JD_EN0

0000

Output enables when selected jack

detection input is logic 0.

[0]= OUT1_EN_0

[1]= OUT2_EN_0

[2]= OUT3_EN_0

[3]= OUT4_EN_0

R13 (00h)

7:4

JD_EN1

0000

Output enables when selected jack

detection input is logic 1

[4]= OUT1_EN_1

[5]= OUT2_EN_1

[6]= OUT3_EN_1

[7]= OUT4_EN_1

Table 35 Jack Detect Register Control Bits

CONTROL INTERFACE

SELECTION OF CONTROL MODE AND 2-WIRE MODE ADDRESS

The control interface can operate as either a 3-wire or 2-wire control interface. The MODE pin

determines the 2 or 3 wire mode as shown in Table 36.

The WM8986 is controlled by writing to registers through a serial control interface. A control word

consists of 16 bits. The first 7 bits (B15 to B9) are register address bits that select which control

each control register.

MODE

INTERFACE FORMAT

Low

2 wire

High

3 wire

Table 36 Control Interface Mode Selection

3-WIRE SERIAL CONTROL MODE

In 3-wire mode, every rising edge of SCLK clocks in one data bit from the SDIN pin. A rising edge on

CSB/GPIO latches in a complete control word consisting of the last 16 bits.

Figure 34 3-Wire Serial Control Interface

WM8986GECO/V Datasheet(PDF) 61 Page - Wolfson Microelectronics plc

WM8986GECO/V Datasheet(HTML) 61 Page - Wolfson Microelectronics plc

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