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DS26519G Datasheet(PDF) 25 Page - Maxim Integrated Products |
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DS26519G Datasheet(HTML) 25 Page - Maxim Integrated Products |
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25 / 310 page ![]() DS26519 16-Port T1/E1/J1 Transceiver 25 of 310 NAME PIN TYPE FUNCTION RECEIVE FRAMER RSER1 D12 RSER2 E12 RSER3 J5 RSER4 AA4 RSER5 Y10 RSER6 AA10 RSER7 B18 RSER8 T20 RSER9 L17 RSER10 L16 RSER11 B1 RSER12 K7 RSER13 J4 RSER14 P7 RSER15 H13 RSER16 M16 Output Received Serial Data 1 to 16. Received NRZ serial data. Updated on rising edges of RCLKn when the receive-side elastic store is disabled. Updated on the rising edges of RSYSCLKn when the receive-side elastic store is enabled. When IBO mode is used, the RSERn pins can output data for multiple framers. The RSERn data is synchronous to RSYSCLKn. See Section 9.8.2 and Table 9-6. RCLK1 J9 RCLK2 H7 RCLK3 J8 RCLK4 H6 RCLK5 T15 RCLK6 U19 RCLK7 V20 RCLK8 W20 RCLK9 D3 RCLK10 C2 RCLK11 H3 RCLK12 G3 RCLK13 T17 RCLK14 R15 RCLK15 T18 RCLK16 N15 Ouput Receive Clock. A 1.544MHz (T1) or 2.048MHz (E1) clock that is used to clock data through the receive-side framer. This clock is recovered from the signal at RTIPn and RRINGn. RSERn data is output on the rising edge of RCLKn. RCLKn is used to output RSERn when the elastic store is not enabled or IBO is not used. When the elastic store is enabled or IBO is used, the RSERn is clocked by RSYSCLKn. RSYSCLK1 U18 RSYSCLK2 G9 RSYSCLK3 J6 RSYSCLK4 W7 RSYSCLK5 AB7 RSYSCLK6 AB10 RSYSCLK7 C19 RSYSCLK8 AA22 RSYSCLK9 G6 RSYSCLK10 P18 RSYSCLK11 F2 RSYSCLK12 AB2 RSYSCLK13 P8 RSYSCLK14 R7 RSYSCLK15 G15 RSYSCLK16 T19 Input Receive System Clock 1 to 16. 1.544MHz, 2.048MHz, 4.096MHz, 8.192MHz, or 16.384MHz receive backplane clock. Only used when the receive-side elastic store function is enabled. Should be tied low in applications that do not use the receive-side elastic store. Multiple of 2.048MHz is expected when the IBO mode is used. |
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