AD9937 datasheet(31/44 Pages) AD

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AD9937

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Controlling LM Pulse Timing

The AD9937 provides an LM output pulse that is fully program-

mable by using the registers in Table XV. Two unique sets of LM

pulses can be preprogrammed using the LMLENx, LMTOG1_x,

and LMTOG2_x (x = 0, 1) registers. Once these pulses are

preprogrammed, they can be individually selected to be output

in any of the five CCD regions by using the LMPATSELn

individually programmed for each CCD region by using the

LMREPn register (n = 0, 1, 2, 3, 4).

The 12-bit H counter and 8-bit LM counters are used for con-

figuring the LM pulse. The 8-bit LM counter resets to 0 when

the 12-bit H counter resets to 0 set by the HDLEN register.

The LMSTART0 and LMSTART1 positions reference the 12-

bit H counter value zero. The 8-bit LM counter begins counting

when LMSTART0 is reached; it counts up to the value set in

the LMLENx register, as shown in Figure 26. The LM pulse

toggle positions reference the 8-bit LM counter.

Figures 26 and 27 provide examples of programming the LM

pulses. Figure 26 shows an example when LMSTART1 is less

than HDLEN. In this case, multiple sets of LM pulses can be

output between the HDLEN lengths. The number of sets is

determined by the value of HDLEN and LMSTART1. Figure 27

shows that only one set of LM pulses will be output when

LMSTART1 is greater than HDLEN.

Table XV. LM Registers

Length

(Bits)

Type

Range

Description

LM_INVERT

Control 0x04

High/Low

LM Inversion Control (1 = Invert Programmed LM)

LMSTART0

Mode_Reg(13)

0–4095 Pixels

LM Counter Start Position 1

LMSTART1

Mode_Reg(13)

0–4095 Pixels

LM Counter Start Position 2

LMLEN0

HLM_Reg(8)

0–255 Pixels

LM Counter Length for LM0

LMTOG1_0

HLM_Reg(8)

0–255 Pixels

LM0 Toggle Position 1

LMTOG2_0

HLM_Reg(8)

0–255 Pixels

LM0 Toggle Position 2

LMLEN1

HLM_Reg(9)

0–255 Pixels

LM Counter Length for LM1

LMTOG1_1

HLM_Reg(9)

0–255 Pixels

LM1 Toggle Position 1

LMTOG2_1

HLM_Reg(9)

0–255 Pixels

LM1 Toggle Position 2

LMPATSEL0

Mode_Reg(15)

High/Low

Selects CCD Region 0 LM Pattern (0 = LM0, 1 = LM1)

LMREP0

Mode_Reg(15)

0–3 LM Repetitions

LM Repetition Number in CCD Region 0

LMPATSEL1

Mode_Reg(16)

High/Low

Selects CCD Region 1 LM Pattern (0 = LM0, 1 = LM1)

LMREP1

Mode_Reg(16)

0–3 LM Repetitions

LM Repetition Number in CCD Region 1

LMPATSEL2

Mode_Reg(17)

High/Low

Selects CCD Region 2 LM Pattern (0 = LM0, 1 = LM1)

LMREP2

Mode_Reg(17)

0–3 LM Repetitions

LM Repetition Number in CCD Region 2

LMPATSEL3

Mode_Reg(18)

High/Low

Selects CCD Region 3 LM Pattern (0 = LM0, 1 = LM1)

LMREP3

Mode_Reg(18)

0–3 LM Repetitions

LM Repetition Number in CCD Region 3

LMPATSEL4

Mode_Reg(19)

High/Low

Selects CCD Region 4 LM Pattern (0 = LM0, 1 = LM1)

LMREP4

Mode_Reg(19)

0–3 LM Repetitions

LM Repetition Number in CCD Region 4

*LMSTART0 and LMSTART1 reference the 12-bit HD counter.

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