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PCD5008 Datasheet(PDF) 32 Page - NXP Semiconductors

Part # PCD5008
Description  FLEX Pager Decoder
PDF  64 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

PCD5008 Datasheet(HTML) 32 Page - NXP Semiconductors

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1998 Jun 17
32
Philips Semiconductors
Product specification
FLEX
™ Pager Decoder
PCD5008
8.6.7
CONFIGURATION OF ASSIGNED FRAMES AND PAGER
COLLAPSE
(ID = 20H TO 27H)
The assigned frame and collapse value determine the
frames in which the decoding device typically looks for
messages (other system factors can cause the decoding
device to look in other frames in addition to the typical
frames).
The PCD5008 must be configured explicitly to receive all
required frames by setting the associated assigned
frame (AF) bits. For each enabled CAPCODE these are
the base frame and the associated frames implied by the
pager collapse value. For example if the PCD5008 has
one enabled address and it is assigned to base frame 3
with a collapse value of 4, the AF bits for
frames 3, 19, 35, 51, 67, 83, 99 and 115 should be set
and the AF bits for all other frames should be cleared.
There are 8 frame assignment packets each capable of
assigning a range of 16 consecutive frame numbers.
f: frame range, see Table 29 for location in the frame
assignment packet and Table 28 for the AFs and values.
The value determines which 16 frames out of a range
of 128 correspond to the 16 AF bits in the packet. At least
one of these bits must have been set when the PCD5008
is turned on by setting the ON bit in the control packet.
Value after reset = 0.
AF: assigned frame (Table 29). If a bit is set, the PCD5008
decodes the associated FLEX
™ frame and scans its
contents for enabled addresses. Value after reset = 0.
Table 28 Frame assignment ranges
8.6.8
CONFIGURATION OF ASSIGNED PHASE
The assigned phase is required only for single-phase
devices. It determines the phase (A, B, C, or D) in which
the messages are received. For details of phase
calculation see Section 8.6.5. For details of programming
the assigned phase see Section 8.4.7.
f2
f1
f0
AF15
AF0
0
0
0
frame 127
frame 112
0
0
1
frame 111
frame 96
0
1
0
frame 95
frame 80
0
1
1
frame 79
frame 64
1
0
0
frame 63
frame 48
1
0
1
frame 47
frame 32
1
1
0
frame 31
frame 16
1
1
1
frame 15
frame 0
Table 29 Frame assignment packet bit assignments
BYTE
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
300100
f2
f1
f0
200000000
1AF15
AF14
AF13
AF12
AF11
AF10
AF9
AF8
0AF7
AF6
AF5
AF4
AF3
AF2
AF1
AF0



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