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VT6306 Datasheet(PDF) 48 Page - VIA Technologies, Inc.

Part # VT6306
Description  PCI 1394a Integrated Host Controller
PDF  59 Pages
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Manufacturer  VIA [VIA Technologies, Inc.]
Direct Link  https://www.viatech.com/en/
Logo VIA - VIA Technologies, Inc.

VT6306 Datasheet(HTML) 48 Page - VIA Technologies, Inc.

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VT6306 PCI 1394a Host Controller
Revision 1.16 July 19, 2002
-42-
Functional Descriptions
PHY-Configuration Packet
The VT6306 PHY will respond to every PHY configuration packet which it receives on the bus, or from the host for transmission
on the bus. The packet has the format shown in the figure below. The fields in the PHY configuration packet are interpreted as
shown in the table below. Note that either or both of R and T must be set to 1.
Note: Bit 0 (the lsb) is on the left in the above diagram
Figure 8. Configuration Packet Format
Table 9. PHY Configuration Packet Fields
Field Name
Meaning
Root_ID
Physical ID. The physical node identifier of the node to become root on next reset
R
Set root. The Force_Root bit in the VT6306 PHY is set if R=1 and Root_ID = the Node_ID of this node
T
Set gap count. If T=1, then the value of the gap count register in the VT6306 is set to gap_cnt.
Gap_cnt
Gap_Count value. New value of Gap Count register
Ping Packet
The VT6306 supports the use of ping for bus round trip calculation. The ping packet has the format shown in the figure below.
When the VT6306 receives a ping packet from the bus or from the local link addressed to the node, it responds immediately
(without arbitration) with a Self_ID packet to both the bus and the local link.
Note: Bit 0 (the lsb) is on the left in the above diagram
Figure 9. Ping Packet Format



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