ATMEGA3290P datasheet(83/360 Pages) ATMEL

83 / 360 page

8021A–AVR–12/06

ATmega329P/3290P

12.3.7

Alternate Functions of Port G

The alternate pin configuration is as follows:

Note:

1. Port G, PG5 is input only. Pull-up is always on.

See Table 25-3 on page 296 for RSTDISBL fuse.

The alternate pin configuration is as follows:

• RESET – Port G, Bit 5

RESET: External Reset input. When the RSTDISBL Fuse is programmed (‘0’), PG5 will function

as input with pull-up always on.

• T0/SEG – Port G, Bit 4

T0, Timer/Counter0 Counter Source.

SEG, LCD front plane 32/23.

• T1/SEG24 – Port G, Bit 3

T1, Timer/Counter1 Counter Source.

SEG, LCD front plane 33/24.

Table 12-20. Overriding Signals for Alternate Functions in PF3:PF0

Signal Name

PF3/ADC3

PF2/ADC2

PF1/ADC1

PF0/ADC0

PUOE

PUOV

DDOE

DDOV

PVOE

PVOV

PTOE

––

DIEOE

DIEOV

––

AIO

ADC3 INPUT

ADC2 INPUT

ADC1 INPUT

ADC0 INPUT

Table 12-21. Port G Pins Alternate Functions (SEG refers to 100-pin/64-pin pinout)

Port Pin

Alternate Function

PG5

RESET(1)

PG4

T0/SEG (Timer/Counter0 Clock Input or LCD Front Plane 32/23)

PG3

T1/SEG (Timer/Counter1 Clock Input or LCD Front Plane 33/24)

PG2

SEG (LCD Front Plane 4/4)

PG1

SEG (LCD Front Plane 17/13)

PG0

SEG (LCD Front Plane 18/14)

ATMEGA3290P Datasheet(PDF) 83 Page - ATMEL Corporation

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