DLPC964 datasheet(24/77 Pages) TI1

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Table 6-5. Block Control Word Fields Definition (continued)

Field Position

Field Type

Field Description

gt0_s_axi_user_k_tx_tdata[34:32]

LOAD_TYPE

000: Block loading. DLPC964 will load the user data to the DMD array area

defined by the BLOCK_ADDRESS and ROW_LENGTH

001: Block Clear. DLPC964 will clear the DMD array to zeroes in the entire

block defined by BLOCK_ADDRESS.

010: Block Set. DLPC964 will set the DMD array to ones in the entire block

defined by BLOCK_ADDRESS

Other values: reserved, do not use.

Note: when in 001 (block clear) or 010 (block set) operation, the

ROW_LENGTH and NORTH_SOUTH_FLIP fields are ignored. Block Set/

Clear operations do not support partial block operation.

gt0_s_axi_user_k_tx_tdata[36]

NORTH_SOUTH_FLIP

Control the direction of data loading within a DMD block.

0: DLPC964 loads data starting and counting up from row 0

1: DLPC964 loads data starting and counting down from row 135

Note: this field only used if LOAD_TYPE is 000

gt0_s_axi_user_k_tx_tdata[29:28]

DMD_SEGMENT

When SINGLE_CHANNEL_MODE = '1', select the DMD segment to which the

DLPC964 will apply the operation.

DLPC964 controller ignores this field if SINGLE_CHANNEL_MODE = '0'

gt0_s_axi_user_k_tx_tdata[30]

SINGLE_CHANNEL_MODE

1: Single channel operation. Loading the DMD array with only Aurora 64B/66B

channel 0.

0: Normal operation. Loading the DMD array with all four Aurora 64B/66B

channels.

gt0_s_axi_user_k_tx_tdata[191:31]

Reserved, unused

6.4.1.1.1 Block Clear and Block Set

As described in Table 6-5, block clear and block set operations are controlled through the use of the

LOAD_TYPE bits in the block control word sent to the DLPC964 through the Aurora 64B/66B interface at the

beginning of a DMD action. When the block clear operation is requested, the SRAM cells in the desired block(s)

are written with logic zero data. When the block set operation is requested, the SRAM cells in the desired

block(s) are written with logic one data. Both of these load types do not require mirror data to be input to the

DLPC964 or mirror data to be sent from the DLPC964 to the DMD.

6.4.1.1.2 Image Orientation—Block Load Increment / Decrement

In Table 6-5, the NORTH_SOUTH_FLIP bits in the block control word determine the direction in which a

DMD block is loaded. A '0' in this field loads data starting at row 0 and incrementing the desired number

of rows indicated by the ROW_LENGTH bits. A '1' in this field will load data beginning at row 136 and

decrementing to the desired number of rows indicated by the ROW_LENGTH bits. Please note that this field is

only used if LOAD_TYPE is set to '000' for block load operation. Block clear and block set operations ignore the

NORTH_SOUTH_FLIP bits.

6.4.1.1.3 Single Channel Mode

In Table 6-5, the SINGLE_CHANNEL_MODE and DMD_SEGMENT bits in the Block Control Word are used

to enable and control Single Channel Mode for the DLPC964 64B/66B input interface. Single Channel Mode

operation allows the DLPC964 controller to operate and load input data from a single 64B/66B Input Channel

(Channel 0) instead of all four 64B/66B Input Channels. A '1' in the SINGLE_CHANNEL_MODE field enables

Single Channel Mode. The DMD_SEGMENT field is utilized to instruct the DLPC964 which DMD Segment the

input data is intended to be loaded.

DLPC964

DLPS167 – MARCH 2024

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