DLPC964 datasheet(28/77 Pages) TI1

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6.4.3 Block Load Address Select

The DLP991U DMD has 16 MCP blocks with each MCP block being 4096 x 136 bits. The block being loaded

can be any one of the 16 MCP blocks on the DMD, with access to each MCP block being independent upon

which block was previously loaded or which will be loaded next.

The BLKADDR_[3:0] inputs define which of the 16 DMD blocks to update. Table 6-7 describes how

BLKADDR_[3:0] is mapped to the MCP blocks for the different MCP modes available in the DMD. The effects

and values of BLKADDR_[3:0] will be restricted based on the block mode selected.

• x1 mode - Use BA[3:0] for single block MCP updates

• x2 mode - Use BA[3:1] for dual block MCP updates

• x4 mode - Use BA[3:2] for quad block MCP updates

• Global mode - No need to use BA[3:0] – updates entire DMD

Block selections shall conform to restrictions inherent in the design of the DLP991U DMD, i.e. x2 and x4 modes

indicate only certain blocks can be simultaneously updated at any given time.

6.4.4 Block Mode Select

The DLPC964 digital controller supports the ability to select one of the following block update modes as well as

which of the 16 block addresses to update utilizing the BLKMODE_[1:0] inputs.

The block modes allowed are:

• x1 Single MCP block updates at a time is reset (can select block from 0 to 15)

• x2 Two blocks are updated concurrently (adjacent w/address of 0, 1, 2, 3, 4, 5, 6, 7)

• x4 Four blocks are updated concurrently (adjacent w/address of 0, 1, 2, 3)

• x16 All blocks are updated with one command (also called global mode).

These mode input pins must be configured at power up. If the mode is desired to be changed after power up,

MCPs must be discontinued, the pins configured to their new values, and the proper I2C command sent to

reconfigure the DMD. See Table 6-7 for detailed information on which blocks are capable of being updated in

each mode.

DLPC964

DLPS167 – MARCH 2024

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DLPC964 Datasheet(PDF) 28 Page - Texas Instruments