DSP56853 datasheet(44/60 Pages) FREESCALE

44 / 60 page

56853 Technical Data, Rev. 6

Freescale Semiconductor

Delay from SCK high to SC2 (wl) high - Master5

tTFSWHM

-1.0

—

1.0

Delay from SC0 high to SC1 (bl) high - Master5

tRFSBHM

-1.0

—

1.0

Delay from SC0 high to SC1 (wl) high - Master5

tRFSWHM

-1.0

—

1.0

Delay from SCK high to SC2 (bl) low - Master5

tTFSBLM

-1.0

—

1.0

Delay from SCK high to SC2 (wl) low - Master5

tTFSWLM

-1.0

—

1.0

Delay from SC0 high to SC1 (bl) low - Master5

tRFSBLM

-1.0

—

1.0

Delay from SC0 high to SC1 (wl) low - Master5

tRFSWLM

-1.0

—

1.0

SCK high to STD enable from high impedance - Master

tTXEM

-0.1

—

SCK high to STD valid - Master

tTXVM

-0.1

—

SCK high to STD not valid - Master

tTXNVM

-0.1

—

SCK high to STD high impedance - Master

tTXHIM

-4

—

SRD Setup time before SC0 low - Master

tSM

—

SRD Hold time after SC0 low - Master

tHM

—

Synchronous Operation (in addition to standard internal clock parameters)

SRD Setup time before SCK low - Master

tTSM

—

SRD Hold time after SCK low - Master

tTHM

—

1. Master mode is internally generated clocks and frame syncs

2. Max clock frequency is IP_clk/4 = 60MHz / 4 = 15MHz for an 120MHz part.

3. All the timings for the ESSI are given for a non-inverted serial clock polarity (TSCKP=0 in SCR2 and RSCKP=0 in SCSR)

and a non-inverted frame sync (TFSI=0 in SCR2 and RFSI=0 in SCSR). If the polarity of the clock and/or the frame sync

have been inverted, all the timings remain valid by inverting the clock signal SCK/SC0 and/or the frame sync SC2/SC1 in

the tables and in the figures.

4. 50 percent duty cycle

5. bl = bit length; wl = word length

Table 4-12 ESSI Master Mode1 Switching Characteristics (Continued)

Operating Conditions: VSS = VSSIO = VSSA = 0 V, VDD = 1.62-1.98V, VDDIO = VDDA = 3.0–3.6V, TA = –40° to +120°C, CL ≤ 50pF, fop = 120MHz

Parameter

Symbol

Min

Typ

Max

Units

DSP56853 Datasheet(PDF) 44 Page - Freescale Semiconductor, Inc

DSP56853 Datasheet(HTML) 44 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Datasheet Download

Link URL